Coverage for MC6809/components/mc6809_ops_test.py: 87%

1#!/usr/bin/env python 

2 

3""" 

4 MC6809 - 6809 CPU emulator in Python 

5 ======================================= 

6 

7 6809 is Big-Endian 

8 

9 Links: 

10 http://dragondata.worldofdragon.org/Publications/inside-dragon.htm 

11 http://www.burgins.com/m6809.html 

12 http://koti.mbnet.fi/~atjs/mc6809/ 

13 

14 :copyleft: 2013-2015 by the MC6809 team, see AUTHORS for more details. 

15 :license: GNU GPL v3 or above, see LICENSE for more details. 

16 

17 Based on: 

18 * ApplyPy by James Tauber (MIT license) 

19 * XRoar emulator by Ciaran Anscomb (GPL license) 

20 more info, see README 

21""" 

22 

23 

24from MC6809.components.cpu_utils.instruction_caller import opcode 

25 

26 

27class OpsTestMixin: 

28 

29 # ---- Test Instructions ---- 

30 

31 @opcode( # Compare memory from stack pointer 

32 0x1083, 0x1093, 0x10a3, 0x10b3, # CMPD (immediate, direct, indexed, extended) 

33 0x118c, 0x119c, 0x11ac, 0x11bc, # CMPS (immediate, direct, indexed, extended) 

34 0x1183, 0x1193, 0x11a3, 0x11b3, # CMPU (immediate, direct, indexed, extended) 

35 0x8c, 0x9c, 0xac, 0xbc, # CMPX (immediate, direct, indexed, extended) 

36 0x108c, 0x109c, 0x10ac, 0x10bc, # CMPY (immediate, direct, indexed, extended) 

37 ) 

38 def instruction_CMP16(self, opcode, m, register): 

39 """ 

40 Compares the 16-bit contents of the concatenated memory locations M:M+1 

41 to the contents of the specified register and sets the appropriate 

42 condition codes. Neither the memory locations nor the specified register 

43 is modified unless autoincrement or autodecrement are used. The carry 

44 flag represents a borrow and is set to the inverse of the resulting 

45 binary carry. 

46 

47 source code forms: CMPD P; CMPX P; CMPY P; CMPU P; CMPS P 

48 

49 CC bits "HNZVC": -aaaa 

50 """ 

51 r = register.value 

52 r_new = r - m 

53# log.warning("$%x CMP16 %s $%x - $%x = $%x" % ( 

54# self.program_counter, 

55# register.name, 

56# r, m, r_new, 

57# )) 

58 self.clear_NZVC() 

59 self.update_NZVC_16(r, m, r_new) 

60 

61 @opcode( # Compare memory from accumulator 

62 0x81, 0x91, 0xa1, 0xb1, # CMPA (immediate, direct, indexed, extended) 

63 0xc1, 0xd1, 0xe1, 0xf1, # CMPB (immediate, direct, indexed, extended) 

64 ) 

65 def instruction_CMP8(self, opcode, m, register): 

66 """ 

67 Compares the contents of memory location to the contents of the 

68 specified register and sets the appropriate condition codes. Neither 

69 memory location M nor the specified register is modified. The carry flag 

70 represents a borrow and is set to the inverse of the resulting binary 

71 carry. 

72 

73 source code forms: CMPA P; CMPB P 

74 

75 CC bits "HNZVC": uaaaa 

76 """ 

77 r = register.value 

78 r_new = r - m 

79# log.warning("$%x CMP8 %s $%x - $%x = $%x" % ( 

80# self.program_counter, 

81# register.name, 

82# r, m, r_new, 

83# )) 

84 self.clear_NZVC() 

85 self.update_NZVC_8(r, m, r_new) 

86 

87 @opcode( # Bit test memory with accumulator 

88 0x85, 0x95, 0xa5, 0xb5, # BITA (immediate, direct, indexed, extended) 

89 0xc5, 0xd5, 0xe5, 0xf5, # BITB (immediate, direct, indexed, extended) 

90 ) 

91 def instruction_BIT(self, opcode, m, register): 

92 """ 

93 Performs the logical AND of the contents of accumulator A or B and the 

94 contents of memory location M and modifies the condition codes 

95 accordingly. The contents of accumulator A or B and memory location M 

96 are not affected. 

97 

98 source code forms: BITA P; BITB P 

99 

100 CC bits "HNZVC": -aa0- 

101 """ 

102 x = register.value 

103 r = m & x 

104# log.debug("$%x BIT update CC with $%x (m:%i & %s:%i)" % ( 

105# self.program_counter, 

106# r, m, register.name, x 

107# )) 

108 self.clear_NZV() 

109 self.update_NZ_8(r) 

110 

111 @opcode( # Test accumulator 

112 0x4d, # TSTA (inherent) 

113 0x5d, # TSTB (inherent) 

114 ) 

115 def instruction_TST_register(self, opcode, register): 

116 """ 

117 Set the N (negative) and Z (zero) bits according to the contents of 

118 accumulator A or B, and clear the V (overflow) bit. The TST instruction 

119 provides only minimum information when testing unsigned values; since no 

120 unsigned value is less than zero, BLO and BLS have no utility. While BHI 

121 could be used after TST, it provides exactly the same control as BNE, 

122 which is preferred. The signed branches are available. 

123 

124 The MC6800 processor clears the C (carry) bit. 

125 

126 source code forms: TST Q; TSTA; TSTB 

127 

128 CC bits "HNZVC": -aa0- 

129 """ 

130 x = register.value 

131 self.clear_NZV() 

132 self.update_NZ_8(x) 

133 

134 @opcode(0xd, 0x6d, 0x7d) # TST (direct, indexed, extended) 

135 def instruction_TST_memory(self, opcode, m): 

136 """ Test memory location """ 

137# log.debug("$%x TST m=$%02x" % ( 

138# self.program_counter, m 

139# )) 

140 self.clear_NZV() 

141 self.update_NZ_8(m)