# SPDX-License-Identifier: Apache-2.0

menu "Wirelink"

config WIRELINK
	bool "Enable Wirelink protocol library"
	default y
	help
	  Build the platform-independent Wirelink protocol core. Transport adapters
	  are opt-in so the core can be shared by Zephyr, bare-metal, and other RTOS
	  projects.

if WIRELINK

config WIRELINK_PLATFORM
	bool "Enable the native clock/session environment"
	select CSPRNG_NEEDED
	help
	  Provide default endpoint time and random instance identities. Without a
	  real CSPRNG, identity acquisition fails; applications can inject their
	  own source instead. Does not use the insecure testing generator.

config WIRELINK_STORAGE
	bool "Enable the optional fixed-block endpoint allocator"
	help
	  Creates generated endpoints in caller-supplied fixed pools. No heap
	  fallback and no allocations during protocol operation.

config WIRELINK_ZEPHYR_WAIT
	bool "Enable the Zephyr owner-task RPC waiter"
	depends on MULTITHREADING
	help
	  Static semaphore-based activity and stop notifications for generated
	  synchronous RPCs. Creates no thread and does no periodic polling.

config WIRELINK_ZEPHYR_UART_DMA
	bool "Enable the Zephyr asynchronous UART adapter"
	depends on SERIAL
	depends on UART_ASYNC_API
	help
	  Build Wirelink's full-duplex Zephyr UART adapter. The adapter owns the
	  UART asynchronous callback, receives directly into the Wirelink SPSC
	  ring, and exposes the UART TX path as the Wirelink sink.

config WIRELINK_ZEPHYR_USB_BULK
	bool "Enable the Zephyr USB vendor bulk adapter"
	depends on USB_DEVICE_STACK_NEXT
	help
	  Build Wirelink's full-duplex custom USB Bulk class. The UDC receives
	  directly into one Wirelink ring claim. USB completion callbacks only
	  publish ownership and completion state; the main loop performs protocol
	  work and re-arms endpoint requests.

config WIRELINK_ZEPHYR_UART_IRQ
	bool "Enable the Zephyr interrupt-driven UART adapter"
	depends on SERIAL
	depends on UART_INTERRUPT_DRIVEN
	help
	  Build Wirelink's interrupt-driven UART adapter. It is the low-latency
	  fallback for USB CDC ACM devices and UART controllers without an async
	  DMA implementation. RX FIFO bytes are written directly into the SPSC
	  ring and all protocol processing remains in the consumer loop.

endif

endmenu
