FICHIERS_MAC_VHDL= \
MAC/pack_MAC.vhd \
MAC/crc_gen.vhd \
MAC/tb_tri_mode_eth_mac.vhd \
MAC/tri_mode_eth_mac.vhd \
MAC/MAC_RX_engine.vhd \
MAC/MAC_TX_engine.vhd

FICHIERS_NTP_VHDL= \
ipbus_lpsc/ntp/ntp_addsub.vhd \
ipbus_lpsc/ntp/ntp_clock_filter.vhd \
ipbus_lpsc/ntp/ntp_dds.vhd \
ipbus_lpsc/ntp/ntp_local_time.vhd \
ipbus_lpsc/ntp/ntp_theta_delta.vhd \
ipbus_lpsc/ntp/ntp_udp_client.vhd \
ipbus_lpsc/ntp/ntp_udp_rx.vhd \
ipbus_lpsc/ntp/ntp_udp_tx.vhd \
ipbus_lpsc/ntp/serial_unsigned_division.vhd \
ipbus_lpsc/ntp/ntp_drift.vhd \
ipbus_lpsc/ntp/ntp_pulse_stretcher.vhd \
ipbus_lpsc/ntp/ntp_main.vhd \
 \
ipbus_lpsc/ntp/ntp_udp_server_sim.vhd \
ipbus_lpsc/ntp/tb_ntp.vhd


FICHIERS_TOP_VHDL= \
/electronique/soft/xilinx_14.7/14.7/ISE_DS/ISE/vhdl/src/unisims/secureip/GTPA1_DUAL.vhd \
MAC/mac_fifo_axi4.vhd \
MAC/emac_hostbus_decl.vhd \
MAC/eth_s6_gmii.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_buffer_selector.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_build_arp.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_build_payload.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_build_ping.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_build_resend.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_build_status.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_byte_sum.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_clock_crossing_if.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_do_rx_reset.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_dualportram.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_dualportram_rx.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_dualportram_tx.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_ipaddr_block.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_packet_parser.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_rarp_block.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_rxram_mux.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_rxram_shim.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_rxtransactor_if_simple.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_status_buffer.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_tx_mux.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_txtransactor_if_simple.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/ipbus_package.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/ipbus_trans_decl.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/trans_arb.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/udp_if_flat.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/transactor_sm.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/transactor_cfg.vhd \
ipbus_2_0_v1/firmware/example_designs/hdl/clock_div.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/transactor_if.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/stretcher.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/transactor.vhd \
ipbus_2_0_v1/firmware/example_designs/hdl/ipbus_addr_decode.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/ipbus_ctrl.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/ipbus_fabric.vhd \
ipbus_2_0_v1/firmware/slaves/hdl/ipbus_reg.vhd \
ipbus_2_0_v1/firmware/slaves/hdl/ipbus_ctrlreg.vhd \
ipbus_2_0_v1/firmware/slaves/hdl/ipbus_ram.vhd \
ipbus_2_0_v1/firmware/slaves/hdl/ipbus_peephole_ram.vhd \
ipbus_2_0_v1/firmware/slaves/hdl/ipbus_pkt_ctr.vhd \
ipbus_2_0_v1/firmware/example_designs/hdl/slaves.vhd

## clocks_s6_extphy_amc_proto.vhd
FICHIERS_EXTPHY_VHDL= \
ipbus_2_0_v1/firmware/example_designs/hdl/clocks_s6_extphy.vhd \
tb_top_sp605_extphy.vhd \
ipbus_2_0_v1/firmware/example_designs/hdl/demo_sp605_extphy/top_sp605_extphy.vhd


FICHIERS_BASEX_VHDL= \
gig_eth_pcs_pma/gig_eth_pcs_pma_v11_3.vhd \
gig_eth_pcs_pma/example_design/gig_eth_pcs_pma_v11_3_block.vhd \
gig_eth_pcs_pma/example_design/transceiver/gig_eth_pcs_pma_v11_3_transceiver_A.vhd \
gig_eth_pcs_pma/example_design/transceiver/gig_eth_pcs_pma_v11_3_s6_gtpwizard.vhd \
gig_eth_pcs_pma/example_design/transceiver/gig_eth_pcs_pma_v11_3_s6_gtpwizard_tile.vhd \
 \
ipbus_2_0_v1/firmware/example_designs/hdl/clocks_s6_basex.vhd \
ipbus_2_0_v1/firmware/ethernet/hdl/eth_s6_1000basex.vhd \
ipbus_2_0_v1/firmware/example_designs/hdl/demo_sp605_basex/top_sp605_basex.vhd \
tb_top_sp605_basex.vhd

FICHIERS_BASEX_AMC_VHDL= \
../synthesis/gig_eth_amc/gig_eth_pcs_pma_v11_3.vhd \
../synthesis/gig_eth_amc/gig_eth_pcs_pma_v11_3/example_design/gig_eth_pcs_pma_v11_3_block.vhd \
../synthesis/gig_eth_amc/gig_eth_pcs_pma_v11_3/example_design/transceiver/gig_eth_pcs_pma_v11_3_transceiver_B.vhd \
../synthesis/gig_eth_amc/gig_eth_pcs_pma_v11_3/example_design/transceiver/gig_eth_pcs_pma_v11_3_s6_gtpwizard.vhd \
../synthesis/gig_eth_amc/gig_eth_pcs_pma_v11_3/example_design/transceiver/gig_eth_pcs_pma_v11_3_s6_gtpwizard_tile.vhd \
 \
clocks_s6_basex_amc_proto.vhd \
../synthesis/eth_s6_1000basex_amc_proto.vhd \
ipbus_2_0_v1/firmware/example_designs/hdl/demo_sp605_basex/top_sp605_basex.vhd \
tb_top_amc_proto_basex.vhd

FICHIERS_LPSC= \
MAC/mac_fifo_axi4.vhd \
MAC/mac_fifo_axi4_lpsc.vhd \
ipbus_2_0_v1/firmware/example_designs/hdl/clock_div.vhd \
ipbus_lpsc/ipbus/clocks_s6_extphy.vhd \
ipbus_lpsc/udp_ip_stack/pack_arp_types.vhd \
ipbus_lpsc/udp_ip_stack/pack_axi.vhd \
ipbus_lpsc/udp_ip_stack/pack_ipv4_types.vhd \
ipbus_lpsc/udp_ip_stack/arp.vhd \
ipbus_lpsc/udp_ip_stack/arp_store.vhd \
ipbus_lpsc/udp_ip_stack/ping.vhd \
ipbus_lpsc/udp_ip_stack/IP_complete_nomac.vhd \
ipbus_lpsc/udp_ip_stack/IPv4.vhd \
ipbus_lpsc/udp_ip_stack/IPv4_RX.vhd \
ipbus_lpsc/udp_ip_stack/IPv4_TX.vhd \
ipbus_lpsc/udp_ip_stack/top_lpsc.vhd \
ipbus_lpsc/udp_ip_stack/mac_tx_arbitrator.vhd \
ipbus_lpsc/udp_ip_stack/IP_tx_arbitrator.vhd \
ipbus_lpsc/udp_ip_stack/UDP_Complete_nomac.vhd \
ipbus_lpsc/udp_ip_stack/UDP_Complete.vhd \
ipbus_lpsc/udp_ip_stack/UDP_RX.vhd \
ipbus_lpsc/udp_ip_stack/UDP_TX.vhd \
ipbus_lpsc/udp_ip_stack/tb_top_lpsc_extphy.vhd \
 \
ipbus_2_0_v1/firmware/ipbus_core/hdl/ipbus_package.vhd \
ipbus_lpsc/ipbus/transactor_lpsc.vhd \
ipbus_lpsc/ipbus/vect_domain_xfer.vhd \
ipbus_lpsc/ipbus/ipbus_dpram32.vhd \
ipbus_lpsc/ipbus/ipbus_main.vhd \
ipbus_lpsc/ipbus/pack_simu_transactor_lpsc.vhd \
ipbus_lpsc/ipbus/tb_transactor.vhd \
ipbus_lpsc/ipbus/top_ipbus_lpsc_extphy.vhd \
ipbus_lpsc/ipbus/tb_top_ipbus_lpsc_extphy.vhd \
ipbus_lpsc/dhcp/top_ipbus_dhcp_lpsc_extphy.vhd \
ipbus_lpsc/dhcp/tb_top_ipbus_dhcp_lpsc_extphy.vhd \
ipbus_lpsc/udp_ip_stack/tb_arp_store.vhd \
ipbus_2_0_v1/firmware/example_designs/hdl/clocks_s6_basex.vhd \
ipbus_lpsc/ipbus/top_ipbus_lpsc_basex.vhd \
ipbus_lpsc/ipbus/tb_top_ipbus_lpsc_basex.vhd \
ipbus_lpsc/ipbus/tb_top_ipbus_lpsc_extphy_wireshark.vhd \
ipbus_lpsc/ipbus/tb_top_ipbus_lpsc_extphy_with_arp.vhd \
 \
ipbus_2_0_v1/firmware/example_designs/hdl/demo_sp605_extphy/top_sp605_extphy.vhd \
ipbus_2_0_v1/firmware/example_designs/hdl/ipbus_addr_decode.vhd \
ipbus_2_0_v1/firmware/ipbus_core/hdl/ipbus_fabric.vhd \
ipbus_2_0_v1/firmware/slaves/hdl/ipbus_reg.vhd \
ipbus_2_0_v1/firmware/slaves/hdl/ipbus_ctrlreg.vhd \
ipbus_2_0_v1/firmware/slaves/hdl/ipbus_ram.vhd \
ipbus_2_0_v1/firmware/slaves/hdl/ipbus_peephole_ram.vhd \
ipbus_2_0_v1/firmware/slaves/hdl/ipbus_pkt_ctr.vhd \
ipbus_2_0_v1/firmware/example_designs/hdl/slaves.vhd


SIM_MAC_ALONE=tb_tri_mode_eth_mac:simu
SIM_TOP=tb_top_sp605_extphy:simu
SIM_BASEXTOP=tb_top_sp605_basex:simu
SIM_LPSC=tb_top_lpsc_extphy:simu
SIM_ARP=tb_arp_store:simu
SIM_TRANS=tb_transactor_lpsc:simu
SIM_IPBUSLPSC=tb_top_ipbus_lpsc_extphy:simu
SIM_IPBUSDHCPLPSC=tb_top_ipbus_dhcp_lpsc_extphy:simu
SIM_IPBUSLPSC_BASEX=tb_top_ipbus_lpsc_basex:simu
SIM_IPBUSLPSCDLINK=tb_top_ipbus_lpsc_extphy_wireshark:simu
SIM_IPBUSLPSCARP=tb_top_ipbus_lpsc_extphy_with_arp:simu
SIM_NTP=tb_ntp:simu

default : help
mac:	compMac simMac

top:	compExtPhy simTop
basextop:	compBaseX simBasexTop
amcbasextop:	compBaseXAmc simBasexTop
arp: compLpsc simArp
lpsc: compLpsc simLpsc
trans: compLpsc simTrans
ipbuslpsc: compLpsc simIpbusLpsc
dhcp: compLpsc simIpbusDhcpLpsc
ipbuslpscbasex: compLpsc simIpbusLpscBasex
ipbuslpscdlink: compLpsc simIpbusLpscDlink
ipbuslpscarp: compLpsc simIpbusLpscARP
ntp: compLpsc simNtp

help : 
	@echo "#####################################################"
	@echo "# make arp : simu arp store seul                    #"
	@echo "# make mac : simu mac seule                         #"
	@echo "# make ntp : simu ntp+udp		                   #"
	@echo "# make top : simu sp605 phy externe                 #"
	@echo "# make basextop : simu sp605 lien série             #"
	@echo "# make amcbasextop : simu amc_proto lien série      #"
	@echo "# make lpsc : simu UDP lpsc                         #"
	@echo "# make trans : simu ipbus_lpsc transactor alone     #"
	@echo "# make ipbuslpsc : simu full ipbus_lpsc_extphy      #"
	@echo "# make dhcp		: simu full ipbus_dhcp_lpsc_extphy #"
	@echo "# make ipbuslpscbasex : simu full ipbus_lpsc_basex  #"
	@echo "# make ipbuslpscdlink : simu ipbus_lpsc_extphy with dlink issue  #"
	@echo "# make ipbuslpscarp : simu ipbus_lpsc_extphy with arp issue  #"
	@echo "#####################################################"

compLpsc: 
	@echo ""
	@echo "#############################################"
	@echo "# COMPILATION                               #"
	@echo "#############################################"
	@echo ""
	ncvhdl -NOC -update $(FICHIERS_LPSC)
	ncvhdl -NOC -update $(FICHIERS_NTP_VHDL)

simNtp :
	@echo ""
	@echo "#########################"
	@echo "# elaboration elab all  #"
	@echo "#########################"
	@echo ""
	ncelab  -nocopyright -access rwc -update $(SIM_NTP)
	@echo ""
	@echo "#########################"
	@echo "# simulation ALL        #"
	@echo "#########################"
	@echo ""
	ncsim -NOCO -update -input ncrun.scr $(SIM_NTP)

simArp :
	@echo ""
	@echo "#########################"
	@echo "# elaboration elab all  #"
	@echo "#########################"
	@echo ""
	ncelab  -nocopyright -access rwc -update $(SIM_ARP)
	@echo ""
	@echo "#########################"
	@echo "# simulation ALL        #"
	@echo "#########################"
	@echo ""
	ncsim -NOCO -update -input ncrun.scr $(SIM_ARP)

simLpsc :
	@echo ""
	@echo "#########################"
	@echo "# elaboration elab all  #"
	@echo "#########################"
	@echo ""
	ncelab  -nocopyright -access rwc -update $(SIM_LPSC)
	@echo ""
	@echo "#########################"
	@echo "# simulation ALL        #"
	@echo "#########################"
	@echo ""
	ncsim -NOCO -update -input ncrun.scr $(SIM_LPSC)

simTrans :
	@echo ""
	@echo "#########################"
	@echo "# elaboration elab all  #"
	@echo "#########################"
	@echo ""
	ncelab  -nocopyright -update -access rwc $(SIM_TRANS)
	@echo ""
	@echo "#########################"
	@echo "# simulation ALL        #"
	@echo "#########################"
	@echo ""
	ncsim -NOCO -update -input ncrun.scr $(SIM_TRANS)

simIpbusLpsc :
	@echo ""
	@echo "#########################"
	@echo "# elaboration elab all  #"
	@echo "#########################"
	@echo ""
	ncelab  -nocopyright -update -access rwc $(SIM_IPBUSLPSC)
	@echo ""
	@echo "#########################"
	@echo "# simulation ALL        #"
	@echo "#########################"
	@echo ""
	ncsim -NOCO -update -input ncrun.scr $(SIM_IPBUSLPSC)

simIpbusDhcpLpsc :
	@echo ""
	@echo "#########################"
	@echo "# elaboration elab all  #"
	@echo "#########################"
	@echo ""
	ncelab  -nocopyright -update -access rwc $(SIM_IPBUSDHCPLPSC)
	@echo ""
	@echo "#########################"
	@echo "# simulation ALL        #"
	@echo "#########################"
	@echo ""
	ncsim -NOCO -update -input ncrun.scr $(SIM_IPBUSDHCPLPSC)

simIpbusLpscBasex :
	@echo ""
	@echo "#########################"
	@echo "# elaboration elab all  #"
	@echo "#########################"
	@echo ""
	ncelab  -nocopyright -update -access rwc $(SIM_IPBUSLPSC_BASEX)
	@echo ""
	@echo "#########################"
	@echo "# simulation ALL        #"
	@echo "#########################"
	@echo ""
	ncsim -NOCO -update -input ncrun.scr $(SIM_IPBUSLPSC_BASEX)

simIpbusLpscDlink :
	@echo ""
	@echo "#########################"
	@echo "# elaboration elab all  #"
	@echo "#########################"
	@echo ""
	ncelab  -nocopyright -update -access rwc $(SIM_IPBUSLPSCDLINK)
	@echo ""
	@echo "#########################"
	@echo "# simulation ALL        #"
	@echo "#########################"
	@echo ""
	ncsim -NOCO -update -input ncrun.scr $(SIM_IPBUSLPSCDLINK)

simIpbusLpscARP :
	@echo ""
	@echo "#########################"
	@echo "# elaboration elab all  #"
	@echo "#########################"
	@echo ""
	ncelab  -nocopyright -update -access rwc $(SIM_IPBUSLPSCARP)
	@echo ""
	@echo "#########################"
	@echo "# simulation ALL        #"
	@echo "#########################"
	@echo ""
	ncsim -NOCO -update -input ncrun.scr $(SIM_IPBUSLPSCARP)

compMac: 
	@echo ""
	@echo "#############################################"
	@echo "# COMPILATION                               #"
	@echo "#############################################"
	@echo ""
	ncvhdl -NOC -update $(FICHIERS_MAC_VHDL)

simMac :
	@echo ""
	@echo "#########################"
	@echo "# elaboration elab all  #"
	@echo "#########################"
	@echo ""
	ncelab  -nocopyright -access rwc -update $(SIM_MAC_ALONE)
	@echo ""
	@echo "#########################"
	@echo "# simulation ALL        #"
	@echo "#########################"
	@echo ""
	ncsim -NOCO -update -input ncrun.scr $(SIM_MAC_ALONE)

compExtPhy: 
	@echo ""
	@echo "#############################################"
	@echo "# COMPILATION                               #"
	@echo "#############################################"
	@echo ""
	ncvhdl -NOC $(FICHIERS_MAC_VHDL)
	ncvhdl -NOC $(FICHIERS_TOP_VHDL)
	ncvhdl -NOC $(FICHIERS_EXTPHY_VHDL)

compBaseX: 
	@echo ""
	@echo "#############################################"
	@echo "# COMPILATION                               #"
	@echo "#############################################"
	@echo ""
	ncvhdl -NOC -update $(FICHIERS_MAC_VHDL)
	ncvhdl -NOC -update $(FICHIERS_TOP_VHDL)
	ncvhdl -NOC -update $(FICHIERS_BASEX_VHDL)

compBaseXAmc: 
	@echo ""
	@echo "#############################################"
	@echo "# COMPILATION                               #"
	@echo "#############################################"
	@echo ""
	ncvhdl -NOC -update $(FICHIERS_MAC_VHDL)
	ncvhdl -NOC -update $(FICHIERS_TOP_VHDL)
	ncvhdl -NOC -update $(FICHIERS_BASEX_AMC_VHDL)

simTop :
	@echo ""
	@echo "#########################"
	@echo "# elaboration elab all  #"
	@echo "#########################"
	@echo ""
	ncelab  -nocopyright -access rwc $(SIM_TOP)
	@echo ""
	@echo "#########################"
	@echo "# simulation ALL        #"
	@echo "#########################"
	@echo ""
	ncsim -NOCO -input ncrun.scr $(SIM_TOP)

simBasexTop :
	@echo ""
	@echo "#########################"
	@echo "# elaboration elab all  #"
	@echo "#########################"
	@echo ""
	ncelab  -nocopyright -access rwc $(SIM_BASEXTOP)
	@echo ""
	@echo "#########################"
	@echo "# simulation ALL        #"
	@echo "#########################"
	@echo ""
	ncsim -NOCO -update -input ncrun.scr $(SIM_BASEXTOP)

clean:
	rm *.log
	rm ../worklib/.cdsvmod  
	rm ../worklib/.inca.db.172.lnx86  
	rm ../worklib/inca.lnx86.172.pak
	rm -rf waves.shm
