clash-lib-0.99.3: CAES Language for Synchronous Hardware - As a Library

Copyright	(C) 2015-2016 University of Twente 2017 Google Inc.
License	BSD2 (see the file LICENSE)
Maintainer	Christiaan Baaij <christiaan.baaij@gmail.com>
Safe Haskell	None
Language	Haskell2010

Clash.Backend.VHDL

Description

Generate VHDL for assorted Netlist datatypes

Synopsis

data VHDLState

Documentation

data VHDLState #

State for the VHDLM monad:

Instances

Backend VHDLState #

Instance details

Defined in Clash.Backend.VHDL

Methods

initBackend :: Int -> HdlSyn -> VHDLState #

hdlKind :: VHDLState -> HDL #

primDirs :: VHDLState -> IO [FilePath] #

name :: VHDLState -> String #

extension :: VHDLState -> String #

extractTypes :: VHDLState -> HashSet HWType #

genHDL :: String -> SrcSpan -> Component -> Mon (State VHDLState) ((String, Doc), [(String, Doc)]) #

mkTyPackage :: String -> [HWType] -> Mon (State VHDLState) [(String, Doc)] #

hdlType :: Usage -> HWType -> Mon (State VHDLState) Doc #

hdlTypeErrValue :: HWType -> Mon (State VHDLState) Doc #

hdlTypeMark :: HWType -> Mon (State VHDLState) Doc #

hdlRecSel :: HWType -> Int -> Mon (State VHDLState) Doc #

hdlSig :: Text -> HWType -> Mon (State VHDLState) Doc #

genStmt :: Bool -> State VHDLState Doc #

inst :: Declaration -> Mon (State VHDLState) (Maybe Doc) #

expr :: Bool -> Expr -> Mon (State VHDLState) Doc #

iwWidth :: State VHDLState Int #

toBV :: HWType -> Text -> Mon (State VHDLState) Doc #

fromBV :: HWType -> Text -> Mon (State VHDLState) Doc #

hdlSyn :: State VHDLState HdlSyn #

mkIdentifier :: State VHDLState (IdType -> Identifier -> Identifier) #

extendIdentifier :: State VHDLState (IdType -> Identifier -> Identifier -> Identifier) #

setModName :: ModName -> VHDLState -> VHDLState #

setSrcSpan :: SrcSpan -> State VHDLState () #

getSrcSpan :: State VHDLState SrcSpan #

blockDecl :: Text -> [Declaration] -> Mon (State VHDLState) Doc #

unextend :: State VHDLState (Identifier -> Identifier) #

addInclude :: (String, Doc) -> State VHDLState () #

addLibraries :: [Text] -> State VHDLState () #

addImports :: [Text] -> State VHDLState () #