#ifdef GET_MVE_BUILTIN_ENUMERATORS
  BI__builtin_arm_mve_asrl,
  BI__builtin_arm_mve_lsll,
  BI__builtin_arm_mve_sqrshr,
  BI__builtin_arm_mve_sqrshrl,
  BI__builtin_arm_mve_sqrshrl_sat48,
  BI__builtin_arm_mve_sqshl,
  BI__builtin_arm_mve_sqshll,
  BI__builtin_arm_mve_srshr,
  BI__builtin_arm_mve_srshrl,
  BI__builtin_arm_mve_uqrshl,
  BI__builtin_arm_mve_uqrshll,
  BI__builtin_arm_mve_uqrshll_sat48,
  BI__builtin_arm_mve_uqshl,
  BI__builtin_arm_mve_uqshll,
  BI__builtin_arm_mve_urshr,
  BI__builtin_arm_mve_urshrl,
  BI__builtin_arm_mve_vabavq_p_s16,
  BI__builtin_arm_mve_vabavq_p_s32,
  BI__builtin_arm_mve_vabavq_p_s8,
  BI__builtin_arm_mve_vabavq_p_u16,
  BI__builtin_arm_mve_vabavq_p_u32,
  BI__builtin_arm_mve_vabavq_p_u8,
  BI__builtin_arm_mve_vabavq_s16,
  BI__builtin_arm_mve_vabavq_s32,
  BI__builtin_arm_mve_vabavq_s8,
  BI__builtin_arm_mve_vabavq_u16,
  BI__builtin_arm_mve_vabavq_u32,
  BI__builtin_arm_mve_vabavq_u8,
  BI__builtin_arm_mve_vabdq_f16,
  BI__builtin_arm_mve_vabdq_f32,
  BI__builtin_arm_mve_vabdq_m_f16,
  BI__builtin_arm_mve_vabdq_m_f32,
  BI__builtin_arm_mve_vabdq_m_s16,
  BI__builtin_arm_mve_vabdq_m_s32,
  BI__builtin_arm_mve_vabdq_m_s8,
  BI__builtin_arm_mve_vabdq_m_u16,
  BI__builtin_arm_mve_vabdq_m_u32,
  BI__builtin_arm_mve_vabdq_m_u8,
  BI__builtin_arm_mve_vabdq_s16,
  BI__builtin_arm_mve_vabdq_s32,
  BI__builtin_arm_mve_vabdq_s8,
  BI__builtin_arm_mve_vabdq_u16,
  BI__builtin_arm_mve_vabdq_u32,
  BI__builtin_arm_mve_vabdq_u8,
  BI__builtin_arm_mve_vabdq_x_f16,
  BI__builtin_arm_mve_vabdq_x_f32,
  BI__builtin_arm_mve_vabdq_x_s16,
  BI__builtin_arm_mve_vabdq_x_s32,
  BI__builtin_arm_mve_vabdq_x_s8,
  BI__builtin_arm_mve_vabdq_x_u16,
  BI__builtin_arm_mve_vabdq_x_u32,
  BI__builtin_arm_mve_vabdq_x_u8,
  BI__builtin_arm_mve_vabsq_f16,
  BI__builtin_arm_mve_vabsq_f32,
  BI__builtin_arm_mve_vabsq_m_f16,
  BI__builtin_arm_mve_vabsq_m_f32,
  BI__builtin_arm_mve_vabsq_m_s16,
  BI__builtin_arm_mve_vabsq_m_s32,
  BI__builtin_arm_mve_vabsq_m_s8,
  BI__builtin_arm_mve_vabsq_s16,
  BI__builtin_arm_mve_vabsq_s32,
  BI__builtin_arm_mve_vabsq_s8,
  BI__builtin_arm_mve_vabsq_x_f16,
  BI__builtin_arm_mve_vabsq_x_f32,
  BI__builtin_arm_mve_vabsq_x_s16,
  BI__builtin_arm_mve_vabsq_x_s32,
  BI__builtin_arm_mve_vabsq_x_s8,
  BI__builtin_arm_mve_vadciq_m_s32,
  BI__builtin_arm_mve_vadciq_m_u32,
  BI__builtin_arm_mve_vadciq_s32,
  BI__builtin_arm_mve_vadciq_u32,
  BI__builtin_arm_mve_vadcq_m_s32,
  BI__builtin_arm_mve_vadcq_m_u32,
  BI__builtin_arm_mve_vadcq_s32,
  BI__builtin_arm_mve_vadcq_u32,
  BI__builtin_arm_mve_vaddlvaq_p_s32,
  BI__builtin_arm_mve_vaddlvaq_p_u32,
  BI__builtin_arm_mve_vaddlvaq_s32,
  BI__builtin_arm_mve_vaddlvaq_u32,
  BI__builtin_arm_mve_vaddlvq_p_s32,
  BI__builtin_arm_mve_vaddlvq_p_u32,
  BI__builtin_arm_mve_vaddlvq_s32,
  BI__builtin_arm_mve_vaddlvq_u32,
  BI__builtin_arm_mve_vaddq_f16,
  BI__builtin_arm_mve_vaddq_f32,
  BI__builtin_arm_mve_vaddq_m_f16,
  BI__builtin_arm_mve_vaddq_m_f32,
  BI__builtin_arm_mve_vaddq_m_n_f16,
  BI__builtin_arm_mve_vaddq_m_n_f32,
  BI__builtin_arm_mve_vaddq_m_n_s16,
  BI__builtin_arm_mve_vaddq_m_n_s32,
  BI__builtin_arm_mve_vaddq_m_n_s8,
  BI__builtin_arm_mve_vaddq_m_n_u16,
  BI__builtin_arm_mve_vaddq_m_n_u32,
  BI__builtin_arm_mve_vaddq_m_n_u8,
  BI__builtin_arm_mve_vaddq_m_s16,
  BI__builtin_arm_mve_vaddq_m_s32,
  BI__builtin_arm_mve_vaddq_m_s8,
  BI__builtin_arm_mve_vaddq_m_u16,
  BI__builtin_arm_mve_vaddq_m_u32,
  BI__builtin_arm_mve_vaddq_m_u8,
  BI__builtin_arm_mve_vaddq_n_f16,
  BI__builtin_arm_mve_vaddq_n_f32,
  BI__builtin_arm_mve_vaddq_n_s16,
  BI__builtin_arm_mve_vaddq_n_s32,
  BI__builtin_arm_mve_vaddq_n_s8,
  BI__builtin_arm_mve_vaddq_n_u16,
  BI__builtin_arm_mve_vaddq_n_u32,
  BI__builtin_arm_mve_vaddq_n_u8,
  BI__builtin_arm_mve_vaddq_s16,
  BI__builtin_arm_mve_vaddq_s32,
  BI__builtin_arm_mve_vaddq_s8,
  BI__builtin_arm_mve_vaddq_u16,
  BI__builtin_arm_mve_vaddq_u32,
  BI__builtin_arm_mve_vaddq_u8,
  BI__builtin_arm_mve_vaddq_x_f16,
  BI__builtin_arm_mve_vaddq_x_f32,
  BI__builtin_arm_mve_vaddq_x_n_f16,
  BI__builtin_arm_mve_vaddq_x_n_f32,
  BI__builtin_arm_mve_vaddq_x_n_s16,
  BI__builtin_arm_mve_vaddq_x_n_s32,
  BI__builtin_arm_mve_vaddq_x_n_s8,
  BI__builtin_arm_mve_vaddq_x_n_u16,
  BI__builtin_arm_mve_vaddq_x_n_u32,
  BI__builtin_arm_mve_vaddq_x_n_u8,
  BI__builtin_arm_mve_vaddq_x_s16,
  BI__builtin_arm_mve_vaddq_x_s32,
  BI__builtin_arm_mve_vaddq_x_s8,
  BI__builtin_arm_mve_vaddq_x_u16,
  BI__builtin_arm_mve_vaddq_x_u32,
  BI__builtin_arm_mve_vaddq_x_u8,
  BI__builtin_arm_mve_vaddvaq_p_s16,
  BI__builtin_arm_mve_vaddvaq_p_s32,
  BI__builtin_arm_mve_vaddvaq_p_s8,
  BI__builtin_arm_mve_vaddvaq_p_u16,
  BI__builtin_arm_mve_vaddvaq_p_u32,
  BI__builtin_arm_mve_vaddvaq_p_u8,
  BI__builtin_arm_mve_vaddvaq_s16,
  BI__builtin_arm_mve_vaddvaq_s32,
  BI__builtin_arm_mve_vaddvaq_s8,
  BI__builtin_arm_mve_vaddvaq_u16,
  BI__builtin_arm_mve_vaddvaq_u32,
  BI__builtin_arm_mve_vaddvaq_u8,
  BI__builtin_arm_mve_vaddvq_p_s16,
  BI__builtin_arm_mve_vaddvq_p_s32,
  BI__builtin_arm_mve_vaddvq_p_s8,
  BI__builtin_arm_mve_vaddvq_p_u16,
  BI__builtin_arm_mve_vaddvq_p_u32,
  BI__builtin_arm_mve_vaddvq_p_u8,
  BI__builtin_arm_mve_vaddvq_s16,
  BI__builtin_arm_mve_vaddvq_s32,
  BI__builtin_arm_mve_vaddvq_s8,
  BI__builtin_arm_mve_vaddvq_u16,
  BI__builtin_arm_mve_vaddvq_u32,
  BI__builtin_arm_mve_vaddvq_u8,
  BI__builtin_arm_mve_vandq_f16,
  BI__builtin_arm_mve_vandq_f32,
  BI__builtin_arm_mve_vandq_m_f16,
  BI__builtin_arm_mve_vandq_m_f32,
  BI__builtin_arm_mve_vandq_m_s16,
  BI__builtin_arm_mve_vandq_m_s32,
  BI__builtin_arm_mve_vandq_m_s8,
  BI__builtin_arm_mve_vandq_m_u16,
  BI__builtin_arm_mve_vandq_m_u32,
  BI__builtin_arm_mve_vandq_m_u8,
  BI__builtin_arm_mve_vandq_s16,
  BI__builtin_arm_mve_vandq_s32,
  BI__builtin_arm_mve_vandq_s8,
  BI__builtin_arm_mve_vandq_u16,
  BI__builtin_arm_mve_vandq_u32,
  BI__builtin_arm_mve_vandq_u8,
  BI__builtin_arm_mve_vandq_x_f16,
  BI__builtin_arm_mve_vandq_x_f32,
  BI__builtin_arm_mve_vandq_x_s16,
  BI__builtin_arm_mve_vandq_x_s32,
  BI__builtin_arm_mve_vandq_x_s8,
  BI__builtin_arm_mve_vandq_x_u16,
  BI__builtin_arm_mve_vandq_x_u32,
  BI__builtin_arm_mve_vandq_x_u8,
  BI__builtin_arm_mve_vbicq_f16,
  BI__builtin_arm_mve_vbicq_f32,
  BI__builtin_arm_mve_vbicq_m_f16,
  BI__builtin_arm_mve_vbicq_m_f32,
  BI__builtin_arm_mve_vbicq_m_n_s16,
  BI__builtin_arm_mve_vbicq_m_n_s32,
  BI__builtin_arm_mve_vbicq_m_n_u16,
  BI__builtin_arm_mve_vbicq_m_n_u32,
  BI__builtin_arm_mve_vbicq_m_s16,
  BI__builtin_arm_mve_vbicq_m_s32,
  BI__builtin_arm_mve_vbicq_m_s8,
  BI__builtin_arm_mve_vbicq_m_u16,
  BI__builtin_arm_mve_vbicq_m_u32,
  BI__builtin_arm_mve_vbicq_m_u8,
  BI__builtin_arm_mve_vbicq_n_s16,
  BI__builtin_arm_mve_vbicq_n_s32,
  BI__builtin_arm_mve_vbicq_n_u16,
  BI__builtin_arm_mve_vbicq_n_u32,
  BI__builtin_arm_mve_vbicq_s16,
  BI__builtin_arm_mve_vbicq_s32,
  BI__builtin_arm_mve_vbicq_s8,
  BI__builtin_arm_mve_vbicq_u16,
  BI__builtin_arm_mve_vbicq_u32,
  BI__builtin_arm_mve_vbicq_u8,
  BI__builtin_arm_mve_vbicq_x_f16,
  BI__builtin_arm_mve_vbicq_x_f32,
  BI__builtin_arm_mve_vbicq_x_s16,
  BI__builtin_arm_mve_vbicq_x_s32,
  BI__builtin_arm_mve_vbicq_x_s8,
  BI__builtin_arm_mve_vbicq_x_u16,
  BI__builtin_arm_mve_vbicq_x_u32,
  BI__builtin_arm_mve_vbicq_x_u8,
  BI__builtin_arm_mve_vbrsrq_m_n_f16,
  BI__builtin_arm_mve_vbrsrq_m_n_f32,
  BI__builtin_arm_mve_vbrsrq_m_n_s16,
  BI__builtin_arm_mve_vbrsrq_m_n_s32,
  BI__builtin_arm_mve_vbrsrq_m_n_s8,
  BI__builtin_arm_mve_vbrsrq_m_n_u16,
  BI__builtin_arm_mve_vbrsrq_m_n_u32,
  BI__builtin_arm_mve_vbrsrq_m_n_u8,
  BI__builtin_arm_mve_vbrsrq_n_f16,
  BI__builtin_arm_mve_vbrsrq_n_f32,
  BI__builtin_arm_mve_vbrsrq_n_s16,
  BI__builtin_arm_mve_vbrsrq_n_s32,
  BI__builtin_arm_mve_vbrsrq_n_s8,
  BI__builtin_arm_mve_vbrsrq_n_u16,
  BI__builtin_arm_mve_vbrsrq_n_u32,
  BI__builtin_arm_mve_vbrsrq_n_u8,
  BI__builtin_arm_mve_vbrsrq_x_n_f16,
  BI__builtin_arm_mve_vbrsrq_x_n_f32,
  BI__builtin_arm_mve_vbrsrq_x_n_s16,
  BI__builtin_arm_mve_vbrsrq_x_n_s32,
  BI__builtin_arm_mve_vbrsrq_x_n_s8,
  BI__builtin_arm_mve_vbrsrq_x_n_u16,
  BI__builtin_arm_mve_vbrsrq_x_n_u32,
  BI__builtin_arm_mve_vbrsrq_x_n_u8,
  BI__builtin_arm_mve_vcaddq_rot270_f16,
  BI__builtin_arm_mve_vcaddq_rot270_f32,
  BI__builtin_arm_mve_vcaddq_rot270_m_f16,
  BI__builtin_arm_mve_vcaddq_rot270_m_f32,
  BI__builtin_arm_mve_vcaddq_rot270_m_s16,
  BI__builtin_arm_mve_vcaddq_rot270_m_s32,
  BI__builtin_arm_mve_vcaddq_rot270_m_s8,
  BI__builtin_arm_mve_vcaddq_rot270_m_u16,
  BI__builtin_arm_mve_vcaddq_rot270_m_u32,
  BI__builtin_arm_mve_vcaddq_rot270_m_u8,
  BI__builtin_arm_mve_vcaddq_rot270_s16,
  BI__builtin_arm_mve_vcaddq_rot270_s32,
  BI__builtin_arm_mve_vcaddq_rot270_s8,
  BI__builtin_arm_mve_vcaddq_rot270_u16,
  BI__builtin_arm_mve_vcaddq_rot270_u32,
  BI__builtin_arm_mve_vcaddq_rot270_u8,
  BI__builtin_arm_mve_vcaddq_rot270_x_f16,
  BI__builtin_arm_mve_vcaddq_rot270_x_f32,
  BI__builtin_arm_mve_vcaddq_rot270_x_s16,
  BI__builtin_arm_mve_vcaddq_rot270_x_s32,
  BI__builtin_arm_mve_vcaddq_rot270_x_s8,
  BI__builtin_arm_mve_vcaddq_rot270_x_u16,
  BI__builtin_arm_mve_vcaddq_rot270_x_u32,
  BI__builtin_arm_mve_vcaddq_rot270_x_u8,
  BI__builtin_arm_mve_vcaddq_rot90_f16,
  BI__builtin_arm_mve_vcaddq_rot90_f32,
  BI__builtin_arm_mve_vcaddq_rot90_m_f16,
  BI__builtin_arm_mve_vcaddq_rot90_m_f32,
  BI__builtin_arm_mve_vcaddq_rot90_m_s16,
  BI__builtin_arm_mve_vcaddq_rot90_m_s32,
  BI__builtin_arm_mve_vcaddq_rot90_m_s8,
  BI__builtin_arm_mve_vcaddq_rot90_m_u16,
  BI__builtin_arm_mve_vcaddq_rot90_m_u32,
  BI__builtin_arm_mve_vcaddq_rot90_m_u8,
  BI__builtin_arm_mve_vcaddq_rot90_s16,
  BI__builtin_arm_mve_vcaddq_rot90_s32,
  BI__builtin_arm_mve_vcaddq_rot90_s8,
  BI__builtin_arm_mve_vcaddq_rot90_u16,
  BI__builtin_arm_mve_vcaddq_rot90_u32,
  BI__builtin_arm_mve_vcaddq_rot90_u8,
  BI__builtin_arm_mve_vcaddq_rot90_x_f16,
  BI__builtin_arm_mve_vcaddq_rot90_x_f32,
  BI__builtin_arm_mve_vcaddq_rot90_x_s16,
  BI__builtin_arm_mve_vcaddq_rot90_x_s32,
  BI__builtin_arm_mve_vcaddq_rot90_x_s8,
  BI__builtin_arm_mve_vcaddq_rot90_x_u16,
  BI__builtin_arm_mve_vcaddq_rot90_x_u32,
  BI__builtin_arm_mve_vcaddq_rot90_x_u8,
  BI__builtin_arm_mve_vclsq_m_s16,
  BI__builtin_arm_mve_vclsq_m_s32,
  BI__builtin_arm_mve_vclsq_m_s8,
  BI__builtin_arm_mve_vclsq_s16,
  BI__builtin_arm_mve_vclsq_s32,
  BI__builtin_arm_mve_vclsq_s8,
  BI__builtin_arm_mve_vclsq_x_s16,
  BI__builtin_arm_mve_vclsq_x_s32,
  BI__builtin_arm_mve_vclsq_x_s8,
  BI__builtin_arm_mve_vclzq_m_s16,
  BI__builtin_arm_mve_vclzq_m_s32,
  BI__builtin_arm_mve_vclzq_m_s8,
  BI__builtin_arm_mve_vclzq_m_u16,
  BI__builtin_arm_mve_vclzq_m_u32,
  BI__builtin_arm_mve_vclzq_m_u8,
  BI__builtin_arm_mve_vclzq_s16,
  BI__builtin_arm_mve_vclzq_s32,
  BI__builtin_arm_mve_vclzq_s8,
  BI__builtin_arm_mve_vclzq_u16,
  BI__builtin_arm_mve_vclzq_u32,
  BI__builtin_arm_mve_vclzq_u8,
  BI__builtin_arm_mve_vclzq_x_s16,
  BI__builtin_arm_mve_vclzq_x_s32,
  BI__builtin_arm_mve_vclzq_x_s8,
  BI__builtin_arm_mve_vclzq_x_u16,
  BI__builtin_arm_mve_vclzq_x_u32,
  BI__builtin_arm_mve_vclzq_x_u8,
  BI__builtin_arm_mve_vcmlaq_f16,
  BI__builtin_arm_mve_vcmlaq_f32,
  BI__builtin_arm_mve_vcmlaq_m_f16,
  BI__builtin_arm_mve_vcmlaq_m_f32,
  BI__builtin_arm_mve_vcmlaq_rot180_f16,
  BI__builtin_arm_mve_vcmlaq_rot180_f32,
  BI__builtin_arm_mve_vcmlaq_rot180_m_f16,
  BI__builtin_arm_mve_vcmlaq_rot180_m_f32,
  BI__builtin_arm_mve_vcmlaq_rot270_f16,
  BI__builtin_arm_mve_vcmlaq_rot270_f32,
  BI__builtin_arm_mve_vcmlaq_rot270_m_f16,
  BI__builtin_arm_mve_vcmlaq_rot270_m_f32,
  BI__builtin_arm_mve_vcmlaq_rot90_f16,
  BI__builtin_arm_mve_vcmlaq_rot90_f32,
  BI__builtin_arm_mve_vcmlaq_rot90_m_f16,
  BI__builtin_arm_mve_vcmlaq_rot90_m_f32,
  BI__builtin_arm_mve_vcmpcsq_m_n_u16,
  BI__builtin_arm_mve_vcmpcsq_m_n_u32,
  BI__builtin_arm_mve_vcmpcsq_m_n_u8,
  BI__builtin_arm_mve_vcmpcsq_m_u16,
  BI__builtin_arm_mve_vcmpcsq_m_u32,
  BI__builtin_arm_mve_vcmpcsq_m_u8,
  BI__builtin_arm_mve_vcmpcsq_n_u16,
  BI__builtin_arm_mve_vcmpcsq_n_u32,
  BI__builtin_arm_mve_vcmpcsq_n_u8,
  BI__builtin_arm_mve_vcmpcsq_u16,
  BI__builtin_arm_mve_vcmpcsq_u32,
  BI__builtin_arm_mve_vcmpcsq_u8,
  BI__builtin_arm_mve_vcmpeqq_f16,
  BI__builtin_arm_mve_vcmpeqq_f32,
  BI__builtin_arm_mve_vcmpeqq_m_f16,
  BI__builtin_arm_mve_vcmpeqq_m_f32,
  BI__builtin_arm_mve_vcmpeqq_m_n_f16,
  BI__builtin_arm_mve_vcmpeqq_m_n_f32,
  BI__builtin_arm_mve_vcmpeqq_m_n_s16,
  BI__builtin_arm_mve_vcmpeqq_m_n_s32,
  BI__builtin_arm_mve_vcmpeqq_m_n_s8,
  BI__builtin_arm_mve_vcmpeqq_m_n_u16,
  BI__builtin_arm_mve_vcmpeqq_m_n_u32,
  BI__builtin_arm_mve_vcmpeqq_m_n_u8,
  BI__builtin_arm_mve_vcmpeqq_m_s16,
  BI__builtin_arm_mve_vcmpeqq_m_s32,
  BI__builtin_arm_mve_vcmpeqq_m_s8,
  BI__builtin_arm_mve_vcmpeqq_m_u16,
  BI__builtin_arm_mve_vcmpeqq_m_u32,
  BI__builtin_arm_mve_vcmpeqq_m_u8,
  BI__builtin_arm_mve_vcmpeqq_n_f16,
  BI__builtin_arm_mve_vcmpeqq_n_f32,
  BI__builtin_arm_mve_vcmpeqq_n_s16,
  BI__builtin_arm_mve_vcmpeqq_n_s32,
  BI__builtin_arm_mve_vcmpeqq_n_s8,
  BI__builtin_arm_mve_vcmpeqq_n_u16,
  BI__builtin_arm_mve_vcmpeqq_n_u32,
  BI__builtin_arm_mve_vcmpeqq_n_u8,
  BI__builtin_arm_mve_vcmpeqq_s16,
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  BI__builtin_arm_mve_vorrq_x_u8,
  BI__builtin_arm_mve_vpnot,
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  BI__builtin_arm_mve_vpselq_s16,
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  BI__builtin_arm_mve_vpselq_u16,
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  BI__builtin_arm_mve_vqaddq_n_u32,
  BI__builtin_arm_mve_vqaddq_n_u8,
  BI__builtin_arm_mve_vqaddq_s16,
  BI__builtin_arm_mve_vqaddq_s32,
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  BI__builtin_arm_mve_vqaddq_u16,
  BI__builtin_arm_mve_vqaddq_u32,
  BI__builtin_arm_mve_vqaddq_u8,
  BI__builtin_arm_mve_vqdmladhq_m_s16,
  BI__builtin_arm_mve_vqdmladhq_m_s32,
  BI__builtin_arm_mve_vqdmladhq_m_s8,
  BI__builtin_arm_mve_vqdmladhq_s16,
  BI__builtin_arm_mve_vqdmladhq_s32,
  BI__builtin_arm_mve_vqdmladhq_s8,
  BI__builtin_arm_mve_vqdmladhxq_m_s16,
  BI__builtin_arm_mve_vqdmladhxq_m_s32,
  BI__builtin_arm_mve_vqdmladhxq_m_s8,
  BI__builtin_arm_mve_vqdmladhxq_s16,
  BI__builtin_arm_mve_vqdmladhxq_s32,
  BI__builtin_arm_mve_vqdmladhxq_s8,
  BI__builtin_arm_mve_vqdmlahq_m_n_s16,
  BI__builtin_arm_mve_vqdmlahq_m_n_s32,
  BI__builtin_arm_mve_vqdmlahq_m_n_s8,
  BI__builtin_arm_mve_vqdmlahq_n_s16,
  BI__builtin_arm_mve_vqdmlahq_n_s32,
  BI__builtin_arm_mve_vqdmlahq_n_s8,
  BI__builtin_arm_mve_vqdmlashq_m_n_s16,
  BI__builtin_arm_mve_vqdmlashq_m_n_s32,
  BI__builtin_arm_mve_vqdmlashq_m_n_s8,
  BI__builtin_arm_mve_vqdmlashq_n_s16,
  BI__builtin_arm_mve_vqdmlashq_n_s32,
  BI__builtin_arm_mve_vqdmlashq_n_s8,
  BI__builtin_arm_mve_vqdmlsdhq_m_s16,
  BI__builtin_arm_mve_vqdmlsdhq_m_s32,
  BI__builtin_arm_mve_vqdmlsdhq_m_s8,
  BI__builtin_arm_mve_vqdmlsdhq_s16,
  BI__builtin_arm_mve_vqdmlsdhq_s32,
  BI__builtin_arm_mve_vqdmlsdhq_s8,
  BI__builtin_arm_mve_vqdmlsdhxq_m_s16,
  BI__builtin_arm_mve_vqdmlsdhxq_m_s32,
  BI__builtin_arm_mve_vqdmlsdhxq_m_s8,
  BI__builtin_arm_mve_vqdmlsdhxq_s16,
  BI__builtin_arm_mve_vqdmlsdhxq_s32,
  BI__builtin_arm_mve_vqdmlsdhxq_s8,
  BI__builtin_arm_mve_vqdmulhq_m_n_s16,
  BI__builtin_arm_mve_vqdmulhq_m_n_s32,
  BI__builtin_arm_mve_vqdmulhq_m_n_s8,
  BI__builtin_arm_mve_vqdmulhq_m_s16,
  BI__builtin_arm_mve_vqdmulhq_m_s32,
  BI__builtin_arm_mve_vqdmulhq_m_s8,
  BI__builtin_arm_mve_vqdmulhq_n_s16,
  BI__builtin_arm_mve_vqdmulhq_n_s32,
  BI__builtin_arm_mve_vqdmulhq_n_s8,
  BI__builtin_arm_mve_vqdmulhq_s16,
  BI__builtin_arm_mve_vqdmulhq_s32,
  BI__builtin_arm_mve_vqdmulhq_s8,
  BI__builtin_arm_mve_vqdmullbq_m_n_s16,
  BI__builtin_arm_mve_vqdmullbq_m_n_s32,
  BI__builtin_arm_mve_vqdmullbq_m_s16,
  BI__builtin_arm_mve_vqdmullbq_m_s32,
  BI__builtin_arm_mve_vqdmullbq_n_s16,
  BI__builtin_arm_mve_vqdmullbq_n_s32,
  BI__builtin_arm_mve_vqdmullbq_s16,
  BI__builtin_arm_mve_vqdmullbq_s32,
  BI__builtin_arm_mve_vqdmulltq_m_n_s16,
  BI__builtin_arm_mve_vqdmulltq_m_n_s32,
  BI__builtin_arm_mve_vqdmulltq_m_s16,
  BI__builtin_arm_mve_vqdmulltq_m_s32,
  BI__builtin_arm_mve_vqdmulltq_n_s16,
  BI__builtin_arm_mve_vqdmulltq_n_s32,
  BI__builtin_arm_mve_vqdmulltq_s16,
  BI__builtin_arm_mve_vqdmulltq_s32,
  BI__builtin_arm_mve_vqmovnbq_m_s16,
  BI__builtin_arm_mve_vqmovnbq_m_s32,
  BI__builtin_arm_mve_vqmovnbq_m_u16,
  BI__builtin_arm_mve_vqmovnbq_m_u32,
  BI__builtin_arm_mve_vqmovnbq_s16,
  BI__builtin_arm_mve_vqmovnbq_s32,
  BI__builtin_arm_mve_vqmovnbq_u16,
  BI__builtin_arm_mve_vqmovnbq_u32,
  BI__builtin_arm_mve_vqmovntq_m_s16,
  BI__builtin_arm_mve_vqmovntq_m_s32,
  BI__builtin_arm_mve_vqmovntq_m_u16,
  BI__builtin_arm_mve_vqmovntq_m_u32,
  BI__builtin_arm_mve_vqmovntq_s16,
  BI__builtin_arm_mve_vqmovntq_s32,
  BI__builtin_arm_mve_vqmovntq_u16,
  BI__builtin_arm_mve_vqmovntq_u32,
  BI__builtin_arm_mve_vqmovunbq_m_s16,
  BI__builtin_arm_mve_vqmovunbq_m_s32,
  BI__builtin_arm_mve_vqmovunbq_s16,
  BI__builtin_arm_mve_vqmovunbq_s32,
  BI__builtin_arm_mve_vqmovuntq_m_s16,
  BI__builtin_arm_mve_vqmovuntq_m_s32,
  BI__builtin_arm_mve_vqmovuntq_s16,
  BI__builtin_arm_mve_vqmovuntq_s32,
  BI__builtin_arm_mve_vqnegq_m_s16,
  BI__builtin_arm_mve_vqnegq_m_s32,
  BI__builtin_arm_mve_vqnegq_m_s8,
  BI__builtin_arm_mve_vqnegq_s16,
  BI__builtin_arm_mve_vqnegq_s32,
  BI__builtin_arm_mve_vqnegq_s8,
  BI__builtin_arm_mve_vqrdmladhq_m_s16,
  BI__builtin_arm_mve_vqrdmladhq_m_s32,
  BI__builtin_arm_mve_vqrdmladhq_m_s8,
  BI__builtin_arm_mve_vqrdmladhq_s16,
  BI__builtin_arm_mve_vqrdmladhq_s32,
  BI__builtin_arm_mve_vqrdmladhq_s8,
  BI__builtin_arm_mve_vqrdmladhxq_m_s16,
  BI__builtin_arm_mve_vqrdmladhxq_m_s32,
  BI__builtin_arm_mve_vqrdmladhxq_m_s8,
  BI__builtin_arm_mve_vqrdmladhxq_s16,
  BI__builtin_arm_mve_vqrdmladhxq_s32,
  BI__builtin_arm_mve_vqrdmladhxq_s8,
  BI__builtin_arm_mve_vqrdmlahq_m_n_s16,
  BI__builtin_arm_mve_vqrdmlahq_m_n_s32,
  BI__builtin_arm_mve_vqrdmlahq_m_n_s8,
  BI__builtin_arm_mve_vqrdmlahq_n_s16,
  BI__builtin_arm_mve_vqrdmlahq_n_s32,
  BI__builtin_arm_mve_vqrdmlahq_n_s8,
  BI__builtin_arm_mve_vqrdmlashq_m_n_s16,
  BI__builtin_arm_mve_vqrdmlashq_m_n_s32,
  BI__builtin_arm_mve_vqrdmlashq_m_n_s8,
  BI__builtin_arm_mve_vqrdmlashq_n_s16,
  BI__builtin_arm_mve_vqrdmlashq_n_s32,
  BI__builtin_arm_mve_vqrdmlashq_n_s8,
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  BI__builtin_arm_mve_vqrdmlsdhq_s16,
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  BI__builtin_arm_mve_vqrdmlsdhxq_m_s16,
  BI__builtin_arm_mve_vqrdmlsdhxq_m_s32,
  BI__builtin_arm_mve_vqrdmlsdhxq_m_s8,
  BI__builtin_arm_mve_vqrdmlsdhxq_s16,
  BI__builtin_arm_mve_vqrdmlsdhxq_s32,
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  BI__builtin_arm_mve_vqrdmulhq_m_n_s16,
  BI__builtin_arm_mve_vqrdmulhq_m_n_s32,
  BI__builtin_arm_mve_vqrdmulhq_m_n_s8,
  BI__builtin_arm_mve_vqrdmulhq_m_s16,
  BI__builtin_arm_mve_vqrdmulhq_m_s32,
  BI__builtin_arm_mve_vqrdmulhq_m_s8,
  BI__builtin_arm_mve_vqrdmulhq_n_s16,
  BI__builtin_arm_mve_vqrdmulhq_n_s32,
  BI__builtin_arm_mve_vqrdmulhq_n_s8,
  BI__builtin_arm_mve_vqrdmulhq_s16,
  BI__builtin_arm_mve_vqrdmulhq_s32,
  BI__builtin_arm_mve_vqrdmulhq_s8,
  BI__builtin_arm_mve_vqrshlq_m_n_s16,
  BI__builtin_arm_mve_vqrshlq_m_n_s32,
  BI__builtin_arm_mve_vqrshlq_m_n_s8,
  BI__builtin_arm_mve_vqrshlq_m_n_u16,
  BI__builtin_arm_mve_vqrshlq_m_n_u32,
  BI__builtin_arm_mve_vqrshlq_m_n_u8,
  BI__builtin_arm_mve_vqrshlq_m_s16,
  BI__builtin_arm_mve_vqrshlq_m_s32,
  BI__builtin_arm_mve_vqrshlq_m_s8,
  BI__builtin_arm_mve_vqrshlq_m_u16,
  BI__builtin_arm_mve_vqrshlq_m_u32,
  BI__builtin_arm_mve_vqrshlq_m_u8,
  BI__builtin_arm_mve_vqrshlq_n_s16,
  BI__builtin_arm_mve_vqrshlq_n_s32,
  BI__builtin_arm_mve_vqrshlq_n_s8,
  BI__builtin_arm_mve_vqrshlq_n_u16,
  BI__builtin_arm_mve_vqrshlq_n_u32,
  BI__builtin_arm_mve_vqrshlq_n_u8,
  BI__builtin_arm_mve_vqrshlq_s16,
  BI__builtin_arm_mve_vqrshlq_s32,
  BI__builtin_arm_mve_vqrshlq_s8,
  BI__builtin_arm_mve_vqrshlq_u16,
  BI__builtin_arm_mve_vqrshlq_u32,
  BI__builtin_arm_mve_vqrshlq_u8,
  BI__builtin_arm_mve_vqrshrnbq_m_n_s16,
  BI__builtin_arm_mve_vqrshrnbq_m_n_s32,
  BI__builtin_arm_mve_vqrshrnbq_m_n_u16,
  BI__builtin_arm_mve_vqrshrnbq_m_n_u32,
  BI__builtin_arm_mve_vqrshrnbq_n_s16,
  BI__builtin_arm_mve_vqrshrnbq_n_s32,
  BI__builtin_arm_mve_vqrshrnbq_n_u16,
  BI__builtin_arm_mve_vqrshrnbq_n_u32,
  BI__builtin_arm_mve_vqrshrntq_m_n_s16,
  BI__builtin_arm_mve_vqrshrntq_m_n_s32,
  BI__builtin_arm_mve_vqrshrntq_m_n_u16,
  BI__builtin_arm_mve_vqrshrntq_m_n_u32,
  BI__builtin_arm_mve_vqrshrntq_n_s16,
  BI__builtin_arm_mve_vqrshrntq_n_s32,
  BI__builtin_arm_mve_vqrshrntq_n_u16,
  BI__builtin_arm_mve_vqrshrntq_n_u32,
  BI__builtin_arm_mve_vqrshrunbq_m_n_s16,
  BI__builtin_arm_mve_vqrshrunbq_m_n_s32,
  BI__builtin_arm_mve_vqrshrunbq_n_s16,
  BI__builtin_arm_mve_vqrshrunbq_n_s32,
  BI__builtin_arm_mve_vqrshruntq_m_n_s16,
  BI__builtin_arm_mve_vqrshruntq_m_n_s32,
  BI__builtin_arm_mve_vqrshruntq_n_s16,
  BI__builtin_arm_mve_vqrshruntq_n_s32,
  BI__builtin_arm_mve_vqshlq_m_n_s16,
  BI__builtin_arm_mve_vqshlq_m_n_s32,
  BI__builtin_arm_mve_vqshlq_m_n_s8,
  BI__builtin_arm_mve_vqshlq_m_n_u16,
  BI__builtin_arm_mve_vqshlq_m_n_u32,
  BI__builtin_arm_mve_vqshlq_m_n_u8,
  BI__builtin_arm_mve_vqshlq_m_r_s16,
  BI__builtin_arm_mve_vqshlq_m_r_s32,
  BI__builtin_arm_mve_vqshlq_m_r_s8,
  BI__builtin_arm_mve_vqshlq_m_r_u16,
  BI__builtin_arm_mve_vqshlq_m_r_u32,
  BI__builtin_arm_mve_vqshlq_m_r_u8,
  BI__builtin_arm_mve_vqshlq_m_s16,
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  BI__builtin_arm_mve_vsubq_x_f16,
  BI__builtin_arm_mve_vsubq_x_f32,
  BI__builtin_arm_mve_vsubq_x_n_f16,
  BI__builtin_arm_mve_vsubq_x_n_f32,
  BI__builtin_arm_mve_vsubq_x_n_s16,
  BI__builtin_arm_mve_vsubq_x_n_s32,
  BI__builtin_arm_mve_vsubq_x_n_s8,
  BI__builtin_arm_mve_vsubq_x_n_u16,
  BI__builtin_arm_mve_vsubq_x_n_u32,
  BI__builtin_arm_mve_vsubq_x_n_u8,
  BI__builtin_arm_mve_vsubq_x_s16,
  BI__builtin_arm_mve_vsubq_x_s32,
  BI__builtin_arm_mve_vsubq_x_s8,
  BI__builtin_arm_mve_vsubq_x_u16,
  BI__builtin_arm_mve_vsubq_x_u32,
  BI__builtin_arm_mve_vsubq_x_u8,
  BI__builtin_arm_mve_vuninitializedq_f16,
  BI__builtin_arm_mve_vuninitializedq_f32,
  BI__builtin_arm_mve_vuninitializedq_polymorphic_f16,
  BI__builtin_arm_mve_vuninitializedq_polymorphic_f32,
  BI__builtin_arm_mve_vuninitializedq_polymorphic_s16,
  BI__builtin_arm_mve_vuninitializedq_polymorphic_s32,
  BI__builtin_arm_mve_vuninitializedq_polymorphic_s64,
  BI__builtin_arm_mve_vuninitializedq_polymorphic_s8,
  BI__builtin_arm_mve_vuninitializedq_polymorphic_u16,
  BI__builtin_arm_mve_vuninitializedq_polymorphic_u32,
  BI__builtin_arm_mve_vuninitializedq_polymorphic_u64,
  BI__builtin_arm_mve_vuninitializedq_polymorphic_u8,
  BI__builtin_arm_mve_vuninitializedq_s16,
  BI__builtin_arm_mve_vuninitializedq_s32,
  BI__builtin_arm_mve_vuninitializedq_s64,
  BI__builtin_arm_mve_vuninitializedq_s8,
  BI__builtin_arm_mve_vuninitializedq_u16,
  BI__builtin_arm_mve_vuninitializedq_u32,
  BI__builtin_arm_mve_vuninitializedq_u64,
  BI__builtin_arm_mve_vuninitializedq_u8,
  BI__builtin_arm_mve_vabavq,
  BI__builtin_arm_mve_vabavq_p,
  BI__builtin_arm_mve_vabdq,
  BI__builtin_arm_mve_vabdq_m,
  BI__builtin_arm_mve_vabdq_x,
  BI__builtin_arm_mve_vabsq,
  BI__builtin_arm_mve_vabsq_m,
  BI__builtin_arm_mve_vabsq_x,
  BI__builtin_arm_mve_vadciq,
  BI__builtin_arm_mve_vadciq_m,
  BI__builtin_arm_mve_vadcq,
  BI__builtin_arm_mve_vadcq_m,
  BI__builtin_arm_mve_vaddlvaq,
  BI__builtin_arm_mve_vaddlvaq_p,
  BI__builtin_arm_mve_vaddlvq,
  BI__builtin_arm_mve_vaddlvq_p,
  BI__builtin_arm_mve_vaddq,
  BI__builtin_arm_mve_vaddq_m,
  BI__builtin_arm_mve_vaddq_x,
  BI__builtin_arm_mve_vaddvaq,
  BI__builtin_arm_mve_vaddvaq_p,
  BI__builtin_arm_mve_vaddvq,
  BI__builtin_arm_mve_vaddvq_p,
  BI__builtin_arm_mve_vandq,
  BI__builtin_arm_mve_vandq_m,
  BI__builtin_arm_mve_vandq_x,
  BI__builtin_arm_mve_vbicq,
  BI__builtin_arm_mve_vbicq_m,
  BI__builtin_arm_mve_vbicq_m_n,
  BI__builtin_arm_mve_vbicq_x,
  BI__builtin_arm_mve_vbrsrq,
  BI__builtin_arm_mve_vbrsrq_m,
  BI__builtin_arm_mve_vbrsrq_x,
  BI__builtin_arm_mve_vcaddq_rot270,
  BI__builtin_arm_mve_vcaddq_rot270_m,
  BI__builtin_arm_mve_vcaddq_rot270_x,
  BI__builtin_arm_mve_vcaddq_rot90,
  BI__builtin_arm_mve_vcaddq_rot90_m,
  BI__builtin_arm_mve_vcaddq_rot90_x,
  BI__builtin_arm_mve_vclsq,
  BI__builtin_arm_mve_vclsq_m,
  BI__builtin_arm_mve_vclsq_x,
  BI__builtin_arm_mve_vclzq,
  BI__builtin_arm_mve_vclzq_m,
  BI__builtin_arm_mve_vclzq_x,
  BI__builtin_arm_mve_vcmlaq,
  BI__builtin_arm_mve_vcmlaq_m,
  BI__builtin_arm_mve_vcmlaq_rot180,
  BI__builtin_arm_mve_vcmlaq_rot180_m,
  BI__builtin_arm_mve_vcmlaq_rot270,
  BI__builtin_arm_mve_vcmlaq_rot270_m,
  BI__builtin_arm_mve_vcmlaq_rot90,
  BI__builtin_arm_mve_vcmlaq_rot90_m,
  BI__builtin_arm_mve_vcmpcsq,
  BI__builtin_arm_mve_vcmpcsq_m,
  BI__builtin_arm_mve_vcmpeqq,
  BI__builtin_arm_mve_vcmpeqq_m,
  BI__builtin_arm_mve_vcmpgeq,
  BI__builtin_arm_mve_vcmpgeq_m,
  BI__builtin_arm_mve_vcmpgtq,
  BI__builtin_arm_mve_vcmpgtq_m,
  BI__builtin_arm_mve_vcmphiq,
  BI__builtin_arm_mve_vcmphiq_m,
  BI__builtin_arm_mve_vcmpleq,
  BI__builtin_arm_mve_vcmpleq_m,
  BI__builtin_arm_mve_vcmpltq,
  BI__builtin_arm_mve_vcmpltq_m,
  BI__builtin_arm_mve_vcmpneq,
  BI__builtin_arm_mve_vcmpneq_m,
  BI__builtin_arm_mve_vcmulq,
  BI__builtin_arm_mve_vcmulq_m,
  BI__builtin_arm_mve_vcmulq_rot180,
  BI__builtin_arm_mve_vcmulq_rot180_m,
  BI__builtin_arm_mve_vcmulq_rot180_x,
  BI__builtin_arm_mve_vcmulq_rot270,
  BI__builtin_arm_mve_vcmulq_rot270_m,
  BI__builtin_arm_mve_vcmulq_rot270_x,
  BI__builtin_arm_mve_vcmulq_rot90,
  BI__builtin_arm_mve_vcmulq_rot90_m,
  BI__builtin_arm_mve_vcmulq_rot90_x,
  BI__builtin_arm_mve_vcmulq_x,
  BI__builtin_arm_mve_vcvtaq_m,
  BI__builtin_arm_mve_vcvtmq_m,
  BI__builtin_arm_mve_vcvtnq_m,
  BI__builtin_arm_mve_vcvtpq_m,
  BI__builtin_arm_mve_vcvtq,
  BI__builtin_arm_mve_vcvtq_m,
  BI__builtin_arm_mve_vcvtq_m_n,
  BI__builtin_arm_mve_vcvtq_n,
  BI__builtin_arm_mve_vcvtq_x,
  BI__builtin_arm_mve_vcvtq_x_n,
  BI__builtin_arm_mve_vddupq_m,
  BI__builtin_arm_mve_vddupq_u16,
  BI__builtin_arm_mve_vddupq_u32,
  BI__builtin_arm_mve_vddupq_u8,
  BI__builtin_arm_mve_vddupq_x_u16,
  BI__builtin_arm_mve_vddupq_x_u32,
  BI__builtin_arm_mve_vddupq_x_u8,
  BI__builtin_arm_mve_vdupq_m,
  BI__builtin_arm_mve_vdwdupq_m,
  BI__builtin_arm_mve_vdwdupq_u16,
  BI__builtin_arm_mve_vdwdupq_u32,
  BI__builtin_arm_mve_vdwdupq_u8,
  BI__builtin_arm_mve_vdwdupq_x_u16,
  BI__builtin_arm_mve_vdwdupq_x_u32,
  BI__builtin_arm_mve_vdwdupq_x_u8,
  BI__builtin_arm_mve_veorq,
  BI__builtin_arm_mve_veorq_m,
  BI__builtin_arm_mve_veorq_x,
  BI__builtin_arm_mve_vfmaq,
  BI__builtin_arm_mve_vfmaq_m,
  BI__builtin_arm_mve_vfmasq,
  BI__builtin_arm_mve_vfmasq_m,
  BI__builtin_arm_mve_vfmsq,
  BI__builtin_arm_mve_vfmsq_m,
  BI__builtin_arm_mve_vgetq_lane,
  BI__builtin_arm_mve_vhaddq,
  BI__builtin_arm_mve_vhaddq_m,
  BI__builtin_arm_mve_vhaddq_x,
  BI__builtin_arm_mve_vhcaddq_rot270,
  BI__builtin_arm_mve_vhcaddq_rot270_m,
  BI__builtin_arm_mve_vhcaddq_rot270_x,
  BI__builtin_arm_mve_vhcaddq_rot90,
  BI__builtin_arm_mve_vhcaddq_rot90_m,
  BI__builtin_arm_mve_vhcaddq_rot90_x,
  BI__builtin_arm_mve_vhsubq,
  BI__builtin_arm_mve_vhsubq_m,
  BI__builtin_arm_mve_vhsubq_x,
  BI__builtin_arm_mve_vidupq_m,
  BI__builtin_arm_mve_vidupq_u16,
  BI__builtin_arm_mve_vidupq_u32,
  BI__builtin_arm_mve_vidupq_u8,
  BI__builtin_arm_mve_vidupq_x_u16,
  BI__builtin_arm_mve_vidupq_x_u32,
  BI__builtin_arm_mve_vidupq_x_u8,
  BI__builtin_arm_mve_viwdupq_m,
  BI__builtin_arm_mve_viwdupq_u16,
  BI__builtin_arm_mve_viwdupq_u32,
  BI__builtin_arm_mve_viwdupq_u8,
  BI__builtin_arm_mve_viwdupq_x_u16,
  BI__builtin_arm_mve_viwdupq_x_u32,
  BI__builtin_arm_mve_viwdupq_x_u8,
  BI__builtin_arm_mve_vld1q,
  BI__builtin_arm_mve_vld1q_z,
  BI__builtin_arm_mve_vld2q,
  BI__builtin_arm_mve_vld4q,
  BI__builtin_arm_mve_vldrbq_gather_offset,
  BI__builtin_arm_mve_vldrbq_gather_offset_z,
  BI__builtin_arm_mve_vldrdq_gather_offset,
  BI__builtin_arm_mve_vldrdq_gather_offset_z,
  BI__builtin_arm_mve_vldrdq_gather_shifted_offset,
  BI__builtin_arm_mve_vldrdq_gather_shifted_offset_z,
  BI__builtin_arm_mve_vldrhq_gather_offset,
  BI__builtin_arm_mve_vldrhq_gather_offset_z,
  BI__builtin_arm_mve_vldrhq_gather_shifted_offset,
  BI__builtin_arm_mve_vldrhq_gather_shifted_offset_z,
  BI__builtin_arm_mve_vldrwq_gather_offset,
  BI__builtin_arm_mve_vldrwq_gather_offset_z,
  BI__builtin_arm_mve_vldrwq_gather_shifted_offset,
  BI__builtin_arm_mve_vldrwq_gather_shifted_offset_z,
  BI__builtin_arm_mve_vmaxaq,
  BI__builtin_arm_mve_vmaxaq_m,
  BI__builtin_arm_mve_vmaxavq,
  BI__builtin_arm_mve_vmaxavq_p,
  BI__builtin_arm_mve_vmaxnmaq,
  BI__builtin_arm_mve_vmaxnmaq_m,
  BI__builtin_arm_mve_vmaxnmavq,
  BI__builtin_arm_mve_vmaxnmavq_p,
  BI__builtin_arm_mve_vmaxnmq,
  BI__builtin_arm_mve_vmaxnmq_m,
  BI__builtin_arm_mve_vmaxnmq_x,
  BI__builtin_arm_mve_vmaxnmvq,
  BI__builtin_arm_mve_vmaxnmvq_p,
  BI__builtin_arm_mve_vmaxq,
  BI__builtin_arm_mve_vmaxq_m,
  BI__builtin_arm_mve_vmaxq_x,
  BI__builtin_arm_mve_vmaxvq,
  BI__builtin_arm_mve_vmaxvq_p,
  BI__builtin_arm_mve_vminaq,
  BI__builtin_arm_mve_vminaq_m,
  BI__builtin_arm_mve_vminavq,
  BI__builtin_arm_mve_vminavq_p,
  BI__builtin_arm_mve_vminnmaq,
  BI__builtin_arm_mve_vminnmaq_m,
  BI__builtin_arm_mve_vminnmavq,
  BI__builtin_arm_mve_vminnmavq_p,
  BI__builtin_arm_mve_vminnmq,
  BI__builtin_arm_mve_vminnmq_m,
  BI__builtin_arm_mve_vminnmq_x,
  BI__builtin_arm_mve_vminnmvq,
  BI__builtin_arm_mve_vminnmvq_p,
  BI__builtin_arm_mve_vminq,
  BI__builtin_arm_mve_vminq_m,
  BI__builtin_arm_mve_vminq_x,
  BI__builtin_arm_mve_vminvq,
  BI__builtin_arm_mve_vminvq_p,
  BI__builtin_arm_mve_vmladavaq,
  BI__builtin_arm_mve_vmladavaq_p,
  BI__builtin_arm_mve_vmladavaxq,
  BI__builtin_arm_mve_vmladavaxq_p,
  BI__builtin_arm_mve_vmladavq,
  BI__builtin_arm_mve_vmladavq_p,
  BI__builtin_arm_mve_vmladavxq,
  BI__builtin_arm_mve_vmladavxq_p,
  BI__builtin_arm_mve_vmlaldavaq,
  BI__builtin_arm_mve_vmlaldavaq_p,
  BI__builtin_arm_mve_vmlaldavaxq,
  BI__builtin_arm_mve_vmlaldavaxq_p,
  BI__builtin_arm_mve_vmlaldavq,
  BI__builtin_arm_mve_vmlaldavq_p,
  BI__builtin_arm_mve_vmlaldavxq,
  BI__builtin_arm_mve_vmlaldavxq_p,
  BI__builtin_arm_mve_vmlaq,
  BI__builtin_arm_mve_vmlaq_m,
  BI__builtin_arm_mve_vmlasq,
  BI__builtin_arm_mve_vmlasq_m,
  BI__builtin_arm_mve_vmlsdavaq,
  BI__builtin_arm_mve_vmlsdavaq_p,
  BI__builtin_arm_mve_vmlsdavaxq,
  BI__builtin_arm_mve_vmlsdavaxq_p,
  BI__builtin_arm_mve_vmlsdavq,
  BI__builtin_arm_mve_vmlsdavq_p,
  BI__builtin_arm_mve_vmlsdavxq,
  BI__builtin_arm_mve_vmlsdavxq_p,
  BI__builtin_arm_mve_vmlsldavaq,
  BI__builtin_arm_mve_vmlsldavaq_p,
  BI__builtin_arm_mve_vmlsldavaxq,
  BI__builtin_arm_mve_vmlsldavaxq_p,
  BI__builtin_arm_mve_vmlsldavq,
  BI__builtin_arm_mve_vmlsldavq_p,
  BI__builtin_arm_mve_vmlsldavxq,
  BI__builtin_arm_mve_vmlsldavxq_p,
  BI__builtin_arm_mve_vmovlbq,
  BI__builtin_arm_mve_vmovlbq_m,
  BI__builtin_arm_mve_vmovlbq_x,
  BI__builtin_arm_mve_vmovltq,
  BI__builtin_arm_mve_vmovltq_m,
  BI__builtin_arm_mve_vmovltq_x,
  BI__builtin_arm_mve_vmovnbq,
  BI__builtin_arm_mve_vmovnbq_m,
  BI__builtin_arm_mve_vmovntq,
  BI__builtin_arm_mve_vmovntq_m,
  BI__builtin_arm_mve_vmulhq,
  BI__builtin_arm_mve_vmulhq_m,
  BI__builtin_arm_mve_vmulhq_x,
  BI__builtin_arm_mve_vmullbq_int,
  BI__builtin_arm_mve_vmullbq_int_m,
  BI__builtin_arm_mve_vmullbq_int_x,
  BI__builtin_arm_mve_vmullbq_poly,
  BI__builtin_arm_mve_vmullbq_poly_m,
  BI__builtin_arm_mve_vmullbq_poly_x,
  BI__builtin_arm_mve_vmulltq_int,
  BI__builtin_arm_mve_vmulltq_int_m,
  BI__builtin_arm_mve_vmulltq_int_x,
  BI__builtin_arm_mve_vmulltq_poly,
  BI__builtin_arm_mve_vmulltq_poly_m,
  BI__builtin_arm_mve_vmulltq_poly_x,
  BI__builtin_arm_mve_vmulq,
  BI__builtin_arm_mve_vmulq_m,
  BI__builtin_arm_mve_vmulq_x,
  BI__builtin_arm_mve_vmvnq,
  BI__builtin_arm_mve_vmvnq_m,
  BI__builtin_arm_mve_vmvnq_x,
  BI__builtin_arm_mve_vnegq,
  BI__builtin_arm_mve_vnegq_m,
  BI__builtin_arm_mve_vnegq_x,
  BI__builtin_arm_mve_vornq,
  BI__builtin_arm_mve_vornq_m,
  BI__builtin_arm_mve_vornq_x,
  BI__builtin_arm_mve_vorrq,
  BI__builtin_arm_mve_vorrq_m,
  BI__builtin_arm_mve_vorrq_m_n,
  BI__builtin_arm_mve_vorrq_x,
  BI__builtin_arm_mve_vpselq,
  BI__builtin_arm_mve_vqabsq,
  BI__builtin_arm_mve_vqabsq_m,
  BI__builtin_arm_mve_vqaddq,
  BI__builtin_arm_mve_vqaddq_m,
  BI__builtin_arm_mve_vqdmladhq,
  BI__builtin_arm_mve_vqdmladhq_m,
  BI__builtin_arm_mve_vqdmladhxq,
  BI__builtin_arm_mve_vqdmladhxq_m,
  BI__builtin_arm_mve_vqdmlahq,
  BI__builtin_arm_mve_vqdmlahq_m,
  BI__builtin_arm_mve_vqdmlashq,
  BI__builtin_arm_mve_vqdmlashq_m,
  BI__builtin_arm_mve_vqdmlsdhq,
  BI__builtin_arm_mve_vqdmlsdhq_m,
  BI__builtin_arm_mve_vqdmlsdhxq,
  BI__builtin_arm_mve_vqdmlsdhxq_m,
  BI__builtin_arm_mve_vqdmulhq,
  BI__builtin_arm_mve_vqdmulhq_m,
  BI__builtin_arm_mve_vqdmullbq,
  BI__builtin_arm_mve_vqdmullbq_m,
  BI__builtin_arm_mve_vqdmulltq,
  BI__builtin_arm_mve_vqdmulltq_m,
  BI__builtin_arm_mve_vqmovnbq,
  BI__builtin_arm_mve_vqmovnbq_m,
  BI__builtin_arm_mve_vqmovntq,
  BI__builtin_arm_mve_vqmovntq_m,
  BI__builtin_arm_mve_vqmovunbq,
  BI__builtin_arm_mve_vqmovunbq_m,
  BI__builtin_arm_mve_vqmovuntq,
  BI__builtin_arm_mve_vqmovuntq_m,
  BI__builtin_arm_mve_vqnegq,
  BI__builtin_arm_mve_vqnegq_m,
  BI__builtin_arm_mve_vqrdmladhq,
  BI__builtin_arm_mve_vqrdmladhq_m,
  BI__builtin_arm_mve_vqrdmladhxq,
  BI__builtin_arm_mve_vqrdmladhxq_m,
  BI__builtin_arm_mve_vqrdmlahq,
  BI__builtin_arm_mve_vqrdmlahq_m,
  BI__builtin_arm_mve_vqrdmlashq,
  BI__builtin_arm_mve_vqrdmlashq_m,
  BI__builtin_arm_mve_vqrdmlsdhq,
  BI__builtin_arm_mve_vqrdmlsdhq_m,
  BI__builtin_arm_mve_vqrdmlsdhxq,
  BI__builtin_arm_mve_vqrdmlsdhxq_m,
  BI__builtin_arm_mve_vqrdmulhq,
  BI__builtin_arm_mve_vqrdmulhq_m,
  BI__builtin_arm_mve_vqrshlq,
  BI__builtin_arm_mve_vqrshlq_m,
  BI__builtin_arm_mve_vqrshlq_m_n,
  BI__builtin_arm_mve_vqrshrnbq,
  BI__builtin_arm_mve_vqrshrnbq_m,
  BI__builtin_arm_mve_vqrshrntq,
  BI__builtin_arm_mve_vqrshrntq_m,
  BI__builtin_arm_mve_vqrshrunbq,
  BI__builtin_arm_mve_vqrshrunbq_m,
  BI__builtin_arm_mve_vqrshruntq,
  BI__builtin_arm_mve_vqrshruntq_m,
  BI__builtin_arm_mve_vqshlq,
  BI__builtin_arm_mve_vqshlq_m,
  BI__builtin_arm_mve_vqshlq_m_n,
  BI__builtin_arm_mve_vqshlq_m_r,
  BI__builtin_arm_mve_vqshlq_n,
  BI__builtin_arm_mve_vqshlq_r,
  BI__builtin_arm_mve_vqshluq,
  BI__builtin_arm_mve_vqshluq_m,
  BI__builtin_arm_mve_vqshrnbq,
  BI__builtin_arm_mve_vqshrnbq_m,
  BI__builtin_arm_mve_vqshrntq,
  BI__builtin_arm_mve_vqshrntq_m,
  BI__builtin_arm_mve_vqshrunbq,
  BI__builtin_arm_mve_vqshrunbq_m,
  BI__builtin_arm_mve_vqshruntq,
  BI__builtin_arm_mve_vqshruntq_m,
  BI__builtin_arm_mve_vqsubq,
  BI__builtin_arm_mve_vqsubq_m,
  BI__builtin_arm_mve_vreinterpretq_f16,
  BI__builtin_arm_mve_vreinterpretq_f32,
  BI__builtin_arm_mve_vreinterpretq_s16,
  BI__builtin_arm_mve_vreinterpretq_s32,
  BI__builtin_arm_mve_vreinterpretq_s64,
  BI__builtin_arm_mve_vreinterpretq_s8,
  BI__builtin_arm_mve_vreinterpretq_u16,
  BI__builtin_arm_mve_vreinterpretq_u32,
  BI__builtin_arm_mve_vreinterpretq_u64,
  BI__builtin_arm_mve_vreinterpretq_u8,
  BI__builtin_arm_mve_vrev16q,
  BI__builtin_arm_mve_vrev16q_m,
  BI__builtin_arm_mve_vrev16q_x,
  BI__builtin_arm_mve_vrev32q,
  BI__builtin_arm_mve_vrev32q_m,
  BI__builtin_arm_mve_vrev32q_x,
  BI__builtin_arm_mve_vrev64q,
  BI__builtin_arm_mve_vrev64q_m,
  BI__builtin_arm_mve_vrev64q_x,
  BI__builtin_arm_mve_vrhaddq,
  BI__builtin_arm_mve_vrhaddq_m,
  BI__builtin_arm_mve_vrhaddq_x,
  BI__builtin_arm_mve_vrmlaldavhaq,
  BI__builtin_arm_mve_vrmlaldavhaq_p,
  BI__builtin_arm_mve_vrmlaldavhaxq,
  BI__builtin_arm_mve_vrmlaldavhaxq_p,
  BI__builtin_arm_mve_vrmlaldavhq,
  BI__builtin_arm_mve_vrmlaldavhq_p,
  BI__builtin_arm_mve_vrmlaldavhxq,
  BI__builtin_arm_mve_vrmlaldavhxq_p,
  BI__builtin_arm_mve_vrmlsldavhaq,
  BI__builtin_arm_mve_vrmlsldavhaq_p,
  BI__builtin_arm_mve_vrmlsldavhaxq,
  BI__builtin_arm_mve_vrmlsldavhaxq_p,
  BI__builtin_arm_mve_vrmlsldavhq,
  BI__builtin_arm_mve_vrmlsldavhq_p,
  BI__builtin_arm_mve_vrmlsldavhxq,
  BI__builtin_arm_mve_vrmlsldavhxq_p,
  BI__builtin_arm_mve_vrmulhq,
  BI__builtin_arm_mve_vrmulhq_m,
  BI__builtin_arm_mve_vrmulhq_x,
  BI__builtin_arm_mve_vrndaq,
  BI__builtin_arm_mve_vrndaq_m,
  BI__builtin_arm_mve_vrndaq_x,
  BI__builtin_arm_mve_vrndmq,
  BI__builtin_arm_mve_vrndmq_m,
  BI__builtin_arm_mve_vrndmq_x,
  BI__builtin_arm_mve_vrndnq,
  BI__builtin_arm_mve_vrndnq_m,
  BI__builtin_arm_mve_vrndnq_x,
  BI__builtin_arm_mve_vrndpq,
  BI__builtin_arm_mve_vrndpq_m,
  BI__builtin_arm_mve_vrndpq_x,
  BI__builtin_arm_mve_vrndq,
  BI__builtin_arm_mve_vrndq_m,
  BI__builtin_arm_mve_vrndq_x,
  BI__builtin_arm_mve_vrndxq,
  BI__builtin_arm_mve_vrndxq_m,
  BI__builtin_arm_mve_vrndxq_x,
  BI__builtin_arm_mve_vrshlq,
  BI__builtin_arm_mve_vrshlq_m,
  BI__builtin_arm_mve_vrshlq_m_n,
  BI__builtin_arm_mve_vrshlq_x,
  BI__builtin_arm_mve_vrshrnbq,
  BI__builtin_arm_mve_vrshrnbq_m,
  BI__builtin_arm_mve_vrshrntq,
  BI__builtin_arm_mve_vrshrntq_m,
  BI__builtin_arm_mve_vrshrq,
  BI__builtin_arm_mve_vrshrq_m,
  BI__builtin_arm_mve_vrshrq_x,
  BI__builtin_arm_mve_vsbciq,
  BI__builtin_arm_mve_vsbciq_m,
  BI__builtin_arm_mve_vsbcq,
  BI__builtin_arm_mve_vsbcq_m,
  BI__builtin_arm_mve_vsetq_lane,
  BI__builtin_arm_mve_vshlcq,
  BI__builtin_arm_mve_vshlcq_m,
  BI__builtin_arm_mve_vshllbq,
  BI__builtin_arm_mve_vshllbq_m,
  BI__builtin_arm_mve_vshllbq_x,
  BI__builtin_arm_mve_vshlltq,
  BI__builtin_arm_mve_vshlltq_m,
  BI__builtin_arm_mve_vshlltq_x,
  BI__builtin_arm_mve_vshlq,
  BI__builtin_arm_mve_vshlq_m,
  BI__builtin_arm_mve_vshlq_m_n,
  BI__builtin_arm_mve_vshlq_m_r,
  BI__builtin_arm_mve_vshlq_n,
  BI__builtin_arm_mve_vshlq_r,
  BI__builtin_arm_mve_vshlq_x,
  BI__builtin_arm_mve_vshlq_x_n,
  BI__builtin_arm_mve_vshrnbq,
  BI__builtin_arm_mve_vshrnbq_m,
  BI__builtin_arm_mve_vshrntq,
  BI__builtin_arm_mve_vshrntq_m,
  BI__builtin_arm_mve_vshrq,
  BI__builtin_arm_mve_vshrq_m,
  BI__builtin_arm_mve_vshrq_x,
  BI__builtin_arm_mve_vsliq,
  BI__builtin_arm_mve_vsliq_m,
  BI__builtin_arm_mve_vsriq,
  BI__builtin_arm_mve_vsriq_m,
  BI__builtin_arm_mve_vst1q,
  BI__builtin_arm_mve_vst1q_p,
  BI__builtin_arm_mve_vst2q,
  BI__builtin_arm_mve_vst4q,
  BI__builtin_arm_mve_vstrbq,
  BI__builtin_arm_mve_vstrbq_p,
  BI__builtin_arm_mve_vstrbq_scatter_offset,
  BI__builtin_arm_mve_vstrbq_scatter_offset_p,
  BI__builtin_arm_mve_vstrdq_scatter_base,
  BI__builtin_arm_mve_vstrdq_scatter_base_p,
  BI__builtin_arm_mve_vstrdq_scatter_base_wb,
  BI__builtin_arm_mve_vstrdq_scatter_base_wb_p,
  BI__builtin_arm_mve_vstrdq_scatter_offset,
  BI__builtin_arm_mve_vstrdq_scatter_offset_p,
  BI__builtin_arm_mve_vstrdq_scatter_shifted_offset,
  BI__builtin_arm_mve_vstrdq_scatter_shifted_offset_p,
  BI__builtin_arm_mve_vstrhq,
  BI__builtin_arm_mve_vstrhq_p,
  BI__builtin_arm_mve_vstrhq_scatter_offset,
  BI__builtin_arm_mve_vstrhq_scatter_offset_p,
  BI__builtin_arm_mve_vstrhq_scatter_shifted_offset,
  BI__builtin_arm_mve_vstrhq_scatter_shifted_offset_p,
  BI__builtin_arm_mve_vstrwq,
  BI__builtin_arm_mve_vstrwq_p,
  BI__builtin_arm_mve_vstrwq_scatter_base,
  BI__builtin_arm_mve_vstrwq_scatter_base_p,
  BI__builtin_arm_mve_vstrwq_scatter_base_wb,
  BI__builtin_arm_mve_vstrwq_scatter_base_wb_p,
  BI__builtin_arm_mve_vstrwq_scatter_offset,
  BI__builtin_arm_mve_vstrwq_scatter_offset_p,
  BI__builtin_arm_mve_vstrwq_scatter_shifted_offset,
  BI__builtin_arm_mve_vstrwq_scatter_shifted_offset_p,
  BI__builtin_arm_mve_vsubq,
  BI__builtin_arm_mve_vsubq_m,
  BI__builtin_arm_mve_vsubq_x,
  BI__builtin_arm_mve_vuninitializedq,
#endif // GET_MVE_BUILTIN_ENUMERATORS

#ifdef GET_MVE_BUILTIN_STR_TABLE

#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Woverlength-strings"
#endif
static constexpr char BuiltinStringsStorage[] =
  "\0"
  "n\0"
  "nt\0"
  "ntu\0"
  "vi.\0"
  "asrl\0"
  "lsll\0"
  "sqrshr\0"
  "sqrshrl\0"
  "sqrshrl_sat48\0"
  "sqshl\0"
  "sqshll\0"
  "srshr\0"
  "srshrl\0"
  "uqrshl\0"
  "uqrshll\0"
  "uqrshll_sat48\0"
  "uqshl\0"
  "uqshll\0"
  "urshr\0"
  "urshrl\0"
  "vabavq_p_s16\0"
  "vabavq_p_s32\0"
  "vabavq_p_s8\0"
  "vabavq_p_u16\0"
  "vabavq_p_u32\0"
  "vabavq_p_u8\0"
  "vabavq_s16\0"
  "vabavq_s32\0"
  "vabavq_s8\0"
  "vabavq_u16\0"
  "vabavq_u32\0"
  "vabavq_u8\0"
  "vabdq_f16\0"
  "vabdq_f32\0"
  "vabdq_m_f16\0"
  "vabdq_m_f32\0"
  "vabdq_m_s16\0"
  "vabdq_m_s32\0"
  "vabdq_m_s8\0"
  "vabdq_m_u16\0"
  "vabdq_m_u32\0"
  "vabdq_m_u8\0"
  "vabdq_s16\0"
  "vabdq_s32\0"
  "vabdq_s8\0"
  "vabdq_u16\0"
  "vabdq_u32\0"
  "vabdq_u8\0"
  "vabdq_x_f16\0"
  "vabdq_x_f32\0"
  "vabdq_x_s16\0"
  "vabdq_x_s32\0"
  "vabdq_x_s8\0"
  "vabdq_x_u16\0"
  "vabdq_x_u32\0"
  "vabdq_x_u8\0"
  "vabsq_f16\0"
  "vabsq_f32\0"
  "vabsq_m_f16\0"
  "vabsq_m_f32\0"
  "vabsq_m_s16\0"
  "vabsq_m_s32\0"
  "vabsq_m_s8\0"
  "vabsq_s16\0"
  "vabsq_s32\0"
  "vabsq_s8\0"
  "vabsq_x_f16\0"
  "vabsq_x_f32\0"
  "vabsq_x_s16\0"
  "vabsq_x_s32\0"
  "vabsq_x_s8\0"
  "vadciq_m_s32\0"
  "vadciq_m_u32\0"
  "vadciq_s32\0"
  "vadciq_u32\0"
  "vadcq_m_s32\0"
  "vadcq_m_u32\0"
  "vadcq_s32\0"
  "vadcq_u32\0"
  "vaddlvaq_p_s32\0"
  "vaddlvaq_p_u32\0"
  "vaddlvaq_s32\0"
  "vaddlvaq_u32\0"
  "vaddlvq_p_s32\0"
  "vaddlvq_p_u32\0"
  "vaddlvq_s32\0"
  "vaddlvq_u32\0"
  "vaddq_f16\0"
  "vaddq_f32\0"
  "vaddq_m_f16\0"
  "vaddq_m_f32\0"
  "vaddq_m_n_f16\0"
  "vaddq_m_n_f32\0"
  "vaddq_m_n_s16\0"
  "vaddq_m_n_s32\0"
  "vaddq_m_n_s8\0"
  "vaddq_m_n_u16\0"
  "vaddq_m_n_u32\0"
  "vaddq_m_n_u8\0"
  "vaddq_m_s16\0"
  "vaddq_m_s32\0"
  "vaddq_m_s8\0"
  "vaddq_m_u16\0"
  "vaddq_m_u32\0"
  "vaddq_m_u8\0"
  "vaddq_n_f16\0"
  "vaddq_n_f32\0"
  "vaddq_n_s16\0"
  "vaddq_n_s32\0"
  "vaddq_n_s8\0"
  "vaddq_n_u16\0"
  "vaddq_n_u32\0"
  "vaddq_n_u8\0"
  "vaddq_s16\0"
  "vaddq_s32\0"
  "vaddq_s8\0"
  "vaddq_u16\0"
  "vaddq_u32\0"
  "vaddq_u8\0"
  "vaddq_x_f16\0"
  "vaddq_x_f32\0"
  "vaddq_x_n_f16\0"
  "vaddq_x_n_f32\0"
  "vaddq_x_n_s16\0"
  "vaddq_x_n_s32\0"
  "vaddq_x_n_s8\0"
  "vaddq_x_n_u16\0"
  "vaddq_x_n_u32\0"
  "vaddq_x_n_u8\0"
  "vaddq_x_s16\0"
  "vaddq_x_s32\0"
  "vaddq_x_s8\0"
  "vaddq_x_u16\0"
  "vaddq_x_u32\0"
  "vaddq_x_u8\0"
  "vaddvaq_p_s16\0"
  "vaddvaq_p_s32\0"
  "vaddvaq_p_s8\0"
  "vaddvaq_p_u16\0"
  "vaddvaq_p_u32\0"
  "vaddvaq_p_u8\0"
  "vaddvaq_s16\0"
  "vaddvaq_s32\0"
  "vaddvaq_s8\0"
  "vaddvaq_u16\0"
  "vaddvaq_u32\0"
  "vaddvaq_u8\0"
  "vaddvq_p_s16\0"
  "vaddvq_p_s32\0"
  "vaddvq_p_s8\0"
  "vaddvq_p_u16\0"
  "vaddvq_p_u32\0"
  "vaddvq_p_u8\0"
  "vaddvq_s16\0"
  "vaddvq_s32\0"
  "vaddvq_s8\0"
  "vaddvq_u16\0"
  "vaddvq_u32\0"
  "vaddvq_u8\0"
  "vandq_f16\0"
  "vandq_f32\0"
  "vandq_m_f16\0"
  "vandq_m_f32\0"
  "vandq_m_s16\0"
  "vandq_m_s32\0"
  "vandq_m_s8\0"
  "vandq_m_u16\0"
  "vandq_m_u32\0"
  "vandq_m_u8\0"
  "vandq_s16\0"
  "vandq_s32\0"
  "vandq_s8\0"
  "vandq_u16\0"
  "vandq_u32\0"
  "vandq_u8\0"
  "vandq_x_f16\0"
  "vandq_x_f32\0"
  "vandq_x_s16\0"
  "vandq_x_s32\0"
  "vandq_x_s8\0"
  "vandq_x_u16\0"
  "vandq_x_u32\0"
  "vandq_x_u8\0"
  "vbicq_f16\0"
  "vbicq_f32\0"
  "vbicq_m_f16\0"
  "vbicq_m_f32\0"
  "vbicq_m_n_s16\0"
  "vbicq_m_n_s32\0"
  "vbicq_m_n_u16\0"
  "vbicq_m_n_u32\0"
  "vbicq_m_s16\0"
  "vbicq_m_s32\0"
  "vbicq_m_s8\0"
  "vbicq_m_u16\0"
  "vbicq_m_u32\0"
  "vbicq_m_u8\0"
  "vbicq_n_s16\0"
  "vbicq_n_s32\0"
  "vbicq_n_u16\0"
  "vbicq_n_u32\0"
  "vbicq_s16\0"
  "vbicq_s32\0"
  "vbicq_s8\0"
  "vbicq_u16\0"
  "vbicq_u32\0"
  "vbicq_u8\0"
  "vbicq_x_f16\0"
  "vbicq_x_f32\0"
  "vbicq_x_s16\0"
  "vbicq_x_s32\0"
  "vbicq_x_s8\0"
  "vbicq_x_u16\0"
  "vbicq_x_u32\0"
  "vbicq_x_u8\0"
  "vbrsrq_m_n_f16\0"
  "vbrsrq_m_n_f32\0"
  "vbrsrq_m_n_s16\0"
  "vbrsrq_m_n_s32\0"
  "vbrsrq_m_n_s8\0"
  "vbrsrq_m_n_u16\0"
  "vbrsrq_m_n_u32\0"
  "vbrsrq_m_n_u8\0"
  "vbrsrq_n_f16\0"
  "vbrsrq_n_f32\0"
  "vbrsrq_n_s16\0"
  "vbrsrq_n_s32\0"
  "vbrsrq_n_s8\0"
  "vbrsrq_n_u16\0"
  "vbrsrq_n_u32\0"
  "vbrsrq_n_u8\0"
  "vbrsrq_x_n_f16\0"
  "vbrsrq_x_n_f32\0"
  "vbrsrq_x_n_s16\0"
  "vbrsrq_x_n_s32\0"
  "vbrsrq_x_n_s8\0"
  "vbrsrq_x_n_u16\0"
  "vbrsrq_x_n_u32\0"
  "vbrsrq_x_n_u8\0"
  "vcaddq_rot270_f16\0"
  "vcaddq_rot270_f32\0"
  "vcaddq_rot270_m_f16\0"
  "vcaddq_rot270_m_f32\0"
  "vcaddq_rot270_m_s16\0"
  "vcaddq_rot270_m_s32\0"
  "vcaddq_rot270_m_s8\0"
  "vcaddq_rot270_m_u16\0"
  "vcaddq_rot270_m_u32\0"
  "vcaddq_rot270_m_u8\0"
  "vcaddq_rot270_s16\0"
  "vcaddq_rot270_s32\0"
  "vcaddq_rot270_s8\0"
  "vcaddq_rot270_u16\0"
  "vcaddq_rot270_u32\0"
  "vcaddq_rot270_u8\0"
  "vcaddq_rot270_x_f16\0"
  "vcaddq_rot270_x_f32\0"
  "vcaddq_rot270_x_s16\0"
  "vcaddq_rot270_x_s32\0"
  "vcaddq_rot270_x_s8\0"
  "vcaddq_rot270_x_u16\0"
  "vcaddq_rot270_x_u32\0"
  "vcaddq_rot270_x_u8\0"
  "vcaddq_rot90_f16\0"
  "vcaddq_rot90_f32\0"
  "vcaddq_rot90_m_f16\0"
  "vcaddq_rot90_m_f32\0"
  "vcaddq_rot90_m_s16\0"
  "vcaddq_rot90_m_s32\0"
  "vcaddq_rot90_m_s8\0"
  "vcaddq_rot90_m_u16\0"
  "vcaddq_rot90_m_u32\0"
  "vcaddq_rot90_m_u8\0"
  "vcaddq_rot90_s16\0"
  "vcaddq_rot90_s32\0"
  "vcaddq_rot90_s8\0"
  "vcaddq_rot90_u16\0"
  "vcaddq_rot90_u32\0"
  "vcaddq_rot90_u8\0"
  "vcaddq_rot90_x_f16\0"
  "vcaddq_rot90_x_f32\0"
  "vcaddq_rot90_x_s16\0"
  "vcaddq_rot90_x_s32\0"
  "vcaddq_rot90_x_s8\0"
  "vcaddq_rot90_x_u16\0"
  "vcaddq_rot90_x_u32\0"
  "vcaddq_rot90_x_u8\0"
  "vclsq_m_s16\0"
  "vclsq_m_s32\0"
  "vclsq_m_s8\0"
  "vclsq_s16\0"
  "vclsq_s32\0"
  "vclsq_s8\0"
  "vclsq_x_s16\0"
  "vclsq_x_s32\0"
  "vclsq_x_s8\0"
  "vclzq_m_s16\0"
  "vclzq_m_s32\0"
  "vclzq_m_s8\0"
  "vclzq_m_u16\0"
  "vclzq_m_u32\0"
  "vclzq_m_u8\0"
  "vclzq_s16\0"
  "vclzq_s32\0"
  "vclzq_s8\0"
  "vclzq_u16\0"
  "vclzq_u32\0"
  "vclzq_u8\0"
  "vclzq_x_s16\0"
  "vclzq_x_s32\0"
  "vclzq_x_s8\0"
  "vclzq_x_u16\0"
  "vclzq_x_u32\0"
  "vclzq_x_u8\0"
  "vcmlaq_f16\0"
  "vcmlaq_f32\0"
  "vcmlaq_m_f16\0"
  "vcmlaq_m_f32\0"
  "vcmlaq_rot180_f16\0"
  "vcmlaq_rot180_f32\0"
  "vcmlaq_rot180_m_f16\0"
  "vcmlaq_rot180_m_f32\0"
  "vcmlaq_rot270_f16\0"
  "vcmlaq_rot270_f32\0"
  "vcmlaq_rot270_m_f16\0"
  "vcmlaq_rot270_m_f32\0"
  "vcmlaq_rot90_f16\0"
  "vcmlaq_rot90_f32\0"
  "vcmlaq_rot90_m_f16\0"
  "vcmlaq_rot90_m_f32\0"
  "vcmpcsq_m_n_u16\0"
  "vcmpcsq_m_n_u32\0"
  "vcmpcsq_m_n_u8\0"
  "vcmpcsq_m_u16\0"
  "vcmpcsq_m_u32\0"
  "vcmpcsq_m_u8\0"
  "vcmpcsq_n_u16\0"
  "vcmpcsq_n_u32\0"
  "vcmpcsq_n_u8\0"
  "vcmpcsq_u16\0"
  "vcmpcsq_u32\0"
  "vcmpcsq_u8\0"
  "vcmpeqq_f16\0"
  "vcmpeqq_f32\0"
  "vcmpeqq_m_f16\0"
  "vcmpeqq_m_f32\0"
  "vcmpeqq_m_n_f16\0"
  "vcmpeqq_m_n_f32\0"
  "vcmpeqq_m_n_s16\0"
  "vcmpeqq_m_n_s32\0"
  "vcmpeqq_m_n_s8\0"
  "vcmpeqq_m_n_u16\0"
  "vcmpeqq_m_n_u32\0"
  "vcmpeqq_m_n_u8\0"
  "vcmpeqq_m_s16\0"
  "vcmpeqq_m_s32\0"
  "vcmpeqq_m_s8\0"
  "vcmpeqq_m_u16\0"
  "vcmpeqq_m_u32\0"
  "vcmpeqq_m_u8\0"
  "vcmpeqq_n_f16\0"
  "vcmpeqq_n_f32\0"
  "vcmpeqq_n_s16\0"
  "vcmpeqq_n_s32\0"
  "vcmpeqq_n_s8\0"
  "vcmpeqq_n_u16\0"
  "vcmpeqq_n_u32\0"
  "vcmpeqq_n_u8\0"
  "vcmpeqq_s16\0"
  "vcmpeqq_s32\0"
  "vcmpeqq_s8\0"
  "vcmpeqq_u16\0"
  "vcmpeqq_u32\0"
  "vcmpeqq_u8\0"
  "vcmpgeq_f16\0"
  "vcmpgeq_f32\0"
  "vcmpgeq_m_f16\0"
  "vcmpgeq_m_f32\0"
  "vcmpgeq_m_n_f16\0"
  "vcmpgeq_m_n_f32\0"
  "vcmpgeq_m_n_s16\0"
  "vcmpgeq_m_n_s32\0"
  "vcmpgeq_m_n_s8\0"
  "vcmpgeq_m_s16\0"
  "vcmpgeq_m_s32\0"
  "vcmpgeq_m_s8\0"
  "vcmpgeq_n_f16\0"
  "vcmpgeq_n_f32\0"
  "vcmpgeq_n_s16\0"
  "vcmpgeq_n_s32\0"
  "vcmpgeq_n_s8\0"
  "vcmpgeq_s16\0"
  "vcmpgeq_s32\0"
  "vcmpgeq_s8\0"
  "vcmpgtq_f16\0"
  "vcmpgtq_f32\0"
  "vcmpgtq_m_f16\0"
  "vcmpgtq_m_f32\0"
  "vcmpgtq_m_n_f16\0"
  "vcmpgtq_m_n_f32\0"
  "vcmpgtq_m_n_s16\0"
  "vcmpgtq_m_n_s32\0"
  "vcmpgtq_m_n_s8\0"
  "vcmpgtq_m_s16\0"
  "vcmpgtq_m_s32\0"
  "vcmpgtq_m_s8\0"
  "vcmpgtq_n_f16\0"
  "vcmpgtq_n_f32\0"
  "vcmpgtq_n_s16\0"
  "vcmpgtq_n_s32\0"
  "vcmpgtq_n_s8\0"
  "vcmpgtq_s16\0"
  "vcmpgtq_s32\0"
  "vcmpgtq_s8\0"
  "vcmphiq_m_n_u16\0"
  "vcmphiq_m_n_u32\0"
  "vcmphiq_m_n_u8\0"
  "vcmphiq_m_u16\0"
  "vcmphiq_m_u32\0"
  "vcmphiq_m_u8\0"
  "vcmphiq_n_u16\0"
  "vcmphiq_n_u32\0"
  "vcmphiq_n_u8\0"
  "vcmphiq_u16\0"
  "vcmphiq_u32\0"
  "vcmphiq_u8\0"
  "vcmpleq_f16\0"
  "vcmpleq_f32\0"
  "vcmpleq_m_f16\0"
  "vcmpleq_m_f32\0"
  "vcmpleq_m_n_f16\0"
  "vcmpleq_m_n_f32\0"
  "vcmpleq_m_n_s16\0"
  "vcmpleq_m_n_s32\0"
  "vcmpleq_m_n_s8\0"
  "vcmpleq_m_s16\0"
  "vcmpleq_m_s32\0"
  "vcmpleq_m_s8\0"
  "vcmpleq_n_f16\0"
  "vcmpleq_n_f32\0"
  "vcmpleq_n_s16\0"
  "vcmpleq_n_s32\0"
  "vcmpleq_n_s8\0"
  "vcmpleq_s16\0"
  "vcmpleq_s32\0"
  "vcmpleq_s8\0"
  "vcmpltq_f16\0"
  "vcmpltq_f32\0"
  "vcmpltq_m_f16\0"
  "vcmpltq_m_f32\0"
  "vcmpltq_m_n_f16\0"
  "vcmpltq_m_n_f32\0"
  "vcmpltq_m_n_s16\0"
  "vcmpltq_m_n_s32\0"
  "vcmpltq_m_n_s8\0"
  "vcmpltq_m_s16\0"
  "vcmpltq_m_s32\0"
  "vcmpltq_m_s8\0"
  "vcmpltq_n_f16\0"
  "vcmpltq_n_f32\0"
  "vcmpltq_n_s16\0"
  "vcmpltq_n_s32\0"
  "vcmpltq_n_s8\0"
  "vcmpltq_s16\0"
  "vcmpltq_s32\0"
  "vcmpltq_s8\0"
  "vcmpneq_f16\0"
  "vcmpneq_f32\0"
  "vcmpneq_m_f16\0"
  "vcmpneq_m_f32\0"
  "vcmpneq_m_n_f16\0"
  "vcmpneq_m_n_f32\0"
  "vcmpneq_m_n_s16\0"
  "vcmpneq_m_n_s32\0"
  "vcmpneq_m_n_s8\0"
  "vcmpneq_m_n_u16\0"
  "vcmpneq_m_n_u32\0"
  "vcmpneq_m_n_u8\0"
  "vcmpneq_m_s16\0"
  "vcmpneq_m_s32\0"
  "vcmpneq_m_s8\0"
  "vcmpneq_m_u16\0"
  "vcmpneq_m_u32\0"
  "vcmpneq_m_u8\0"
  "vcmpneq_n_f16\0"
  "vcmpneq_n_f32\0"
  "vcmpneq_n_s16\0"
  "vcmpneq_n_s32\0"
  "vcmpneq_n_s8\0"
  "vcmpneq_n_u16\0"
  "vcmpneq_n_u32\0"
  "vcmpneq_n_u8\0"
  "vcmpneq_s16\0"
  "vcmpneq_s32\0"
  "vcmpneq_s8\0"
  "vcmpneq_u16\0"
  "vcmpneq_u32\0"
  "vcmpneq_u8\0"
  "vcmulq_f16\0"
  "vcmulq_f32\0"
  "vcmulq_m_f16\0"
  "vcmulq_m_f32\0"
  "vcmulq_rot180_f16\0"
  "vcmulq_rot180_f32\0"
  "vcmulq_rot180_m_f16\0"
  "vcmulq_rot180_m_f32\0"
  "vcmulq_rot180_x_f16\0"
  "vcmulq_rot180_x_f32\0"
  "vcmulq_rot270_f16\0"
  "vcmulq_rot270_f32\0"
  "vcmulq_rot270_m_f16\0"
  "vcmulq_rot270_m_f32\0"
  "vcmulq_rot270_x_f16\0"
  "vcmulq_rot270_x_f32\0"
  "vcmulq_rot90_f16\0"
  "vcmulq_rot90_f32\0"
  "vcmulq_rot90_m_f16\0"
  "vcmulq_rot90_m_f32\0"
  "vcmulq_rot90_x_f16\0"
  "vcmulq_rot90_x_f32\0"
  "vcmulq_x_f16\0"
  "vcmulq_x_f32\0"
  "vcreateq_f16\0"
  "vcreateq_f32\0"
  "vcreateq_s16\0"
  "vcreateq_s32\0"
  "vcreateq_s64\0"
  "vcreateq_s8\0"
  "vcreateq_u16\0"
  "vcreateq_u32\0"
  "vcreateq_u64\0"
  "vcreateq_u8\0"
  "vctp16q\0"
  "vctp16q_m\0"
  "vctp32q\0"
  "vctp32q_m\0"
  "vctp64q\0"
  "vctp64q_m\0"
  "vctp8q\0"
  "vctp8q_m\0"
  "vcvtaq_m_s16_f16\0"
  "vcvtaq_m_s32_f32\0"
  "vcvtaq_m_u16_f16\0"
  "vcvtaq_m_u32_f32\0"
  "vcvtaq_s16_f16\0"
  "vcvtaq_s32_f32\0"
  "vcvtaq_u16_f16\0"
  "vcvtaq_u32_f32\0"
  "vcvtaq_x_s16_f16\0"
  "vcvtaq_x_s32_f32\0"
  "vcvtaq_x_u16_f16\0"
  "vcvtaq_x_u32_f32\0"
  "vcvtbq_f16_f32\0"
  "vcvtbq_f32_f16\0"
  "vcvtbq_m_f16_f32\0"
  "vcvtbq_m_f32_f16\0"
  "vcvtbq_x_f32_f16\0"
  "vcvtmq_m_s16_f16\0"
  "vcvtmq_m_s32_f32\0"
  "vcvtmq_m_u16_f16\0"
  "vcvtmq_m_u32_f32\0"
  "vcvtmq_s16_f16\0"
  "vcvtmq_s32_f32\0"
  "vcvtmq_u16_f16\0"
  "vcvtmq_u32_f32\0"
  "vcvtmq_x_s16_f16\0"
  "vcvtmq_x_s32_f32\0"
  "vcvtmq_x_u16_f16\0"
  "vcvtmq_x_u32_f32\0"
  "vcvtnq_m_s16_f16\0"
  "vcvtnq_m_s32_f32\0"
  "vcvtnq_m_u16_f16\0"
  "vcvtnq_m_u32_f32\0"
  "vcvtnq_s16_f16\0"
  "vcvtnq_s32_f32\0"
  "vcvtnq_u16_f16\0"
  "vcvtnq_u32_f32\0"
  "vcvtnq_x_s16_f16\0"
  "vcvtnq_x_s32_f32\0"
  "vcvtnq_x_u16_f16\0"
  "vcvtnq_x_u32_f32\0"
  "vcvtpq_m_s16_f16\0"
  "vcvtpq_m_s32_f32\0"
  "vcvtpq_m_u16_f16\0"
  "vcvtpq_m_u32_f32\0"
  "vcvtpq_s16_f16\0"
  "vcvtpq_s32_f32\0"
  "vcvtpq_u16_f16\0"
  "vcvtpq_u32_f32\0"
  "vcvtpq_x_s16_f16\0"
  "vcvtpq_x_s32_f32\0"
  "vcvtpq_x_u16_f16\0"
  "vcvtpq_x_u32_f32\0"
  "vcvtq_f16_s16\0"
  "vcvtq_f16_u16\0"
  "vcvtq_f32_s32\0"
  "vcvtq_f32_u32\0"
  "vcvtq_m_f16_s16\0"
  "vcvtq_m_f16_u16\0"
  "vcvtq_m_f32_s32\0"
  "vcvtq_m_f32_u32\0"
  "vcvtq_m_n_f16_s16\0"
  "vcvtq_m_n_f16_u16\0"
  "vcvtq_m_n_f32_s32\0"
  "vcvtq_m_n_f32_u32\0"
  "vcvtq_m_n_s16_f16\0"
  "vcvtq_m_n_s32_f32\0"
  "vcvtq_m_n_u16_f16\0"
  "vcvtq_m_n_u32_f32\0"
  "vcvtq_m_s16_f16\0"
  "vcvtq_m_s32_f32\0"
  "vcvtq_m_u16_f16\0"
  "vcvtq_m_u32_f32\0"
  "vcvtq_n_f16_s16\0"
  "vcvtq_n_f16_u16\0"
  "vcvtq_n_f32_s32\0"
  "vcvtq_n_f32_u32\0"
  "vcvtq_n_s16_f16\0"
  "vcvtq_n_s32_f32\0"
  "vcvtq_n_u16_f16\0"
  "vcvtq_n_u32_f32\0"
  "vcvtq_s16_f16\0"
  "vcvtq_s32_f32\0"
  "vcvtq_u16_f16\0"
  "vcvtq_u32_f32\0"
  "vcvtq_x_f16_s16\0"
  "vcvtq_x_f16_u16\0"
  "vcvtq_x_f32_s32\0"
  "vcvtq_x_f32_u32\0"
  "vcvtq_x_n_f16_s16\0"
  "vcvtq_x_n_f16_u16\0"
  "vcvtq_x_n_f32_s32\0"
  "vcvtq_x_n_f32_u32\0"
  "vcvtq_x_n_s16_f16\0"
  "vcvtq_x_n_s32_f32\0"
  "vcvtq_x_n_u16_f16\0"
  "vcvtq_x_n_u32_f32\0"
  "vcvtq_x_s16_f16\0"
  "vcvtq_x_s32_f32\0"
  "vcvtq_x_u16_f16\0"
  "vcvtq_x_u32_f32\0"
  "vcvttq_f16_f32\0"
  "vcvttq_f32_f16\0"
  "vcvttq_m_f16_f32\0"
  "vcvttq_m_f32_f16\0"
  "vcvttq_x_f32_f16\0"
  "vddupq_m_n_u16\0"
  "vddupq_m_n_u32\0"
  "vddupq_m_n_u8\0"
  "vddupq_m_wb_u16\0"
  "vddupq_m_wb_u32\0"
  "vddupq_m_wb_u8\0"
  "vddupq_n_u16\0"
  "vddupq_n_u32\0"
  "vddupq_n_u8\0"
  "vddupq_wb_u16\0"
  "vddupq_wb_u32\0"
  "vddupq_wb_u8\0"
  "vddupq_x_n_u16\0"
  "vddupq_x_n_u32\0"
  "vddupq_x_n_u8\0"
  "vddupq_x_wb_u16\0"
  "vddupq_x_wb_u32\0"
  "vddupq_x_wb_u8\0"
  "vdupq_m_n_f16\0"
  "vdupq_m_n_f32\0"
  "vdupq_m_n_s16\0"
  "vdupq_m_n_s32\0"
  "vdupq_m_n_s8\0"
  "vdupq_m_n_u16\0"
  "vdupq_m_n_u32\0"
  "vdupq_m_n_u8\0"
  "vdupq_n_f16\0"
  "vdupq_n_f32\0"
  "vdupq_n_s16\0"
  "vdupq_n_s32\0"
  "vdupq_n_s8\0"
  "vdupq_n_u16\0"
  "vdupq_n_u32\0"
  "vdupq_n_u8\0"
  "vdupq_x_n_f16\0"
  "vdupq_x_n_f32\0"
  "vdupq_x_n_s16\0"
  "vdupq_x_n_s32\0"
  "vdupq_x_n_s8\0"
  "vdupq_x_n_u16\0"
  "vdupq_x_n_u32\0"
  "vdupq_x_n_u8\0"
  "vdwdupq_m_n_u16\0"
  "vdwdupq_m_n_u32\0"
  "vdwdupq_m_n_u8\0"
  "vdwdupq_m_wb_u16\0"
  "vdwdupq_m_wb_u32\0"
  "vdwdupq_m_wb_u8\0"
  "vdwdupq_n_u16\0"
  "vdwdupq_n_u32\0"
  "vdwdupq_n_u8\0"
  "vdwdupq_wb_u16\0"
  "vdwdupq_wb_u32\0"
  "vdwdupq_wb_u8\0"
  "vdwdupq_x_n_u16\0"
  "vdwdupq_x_n_u32\0"
  "vdwdupq_x_n_u8\0"
  "vdwdupq_x_wb_u16\0"
  "vdwdupq_x_wb_u32\0"
  "vdwdupq_x_wb_u8\0"
  "veorq_f16\0"
  "veorq_f32\0"
  "veorq_m_f16\0"
  "veorq_m_f32\0"
  "veorq_m_s16\0"
  "veorq_m_s32\0"
  "veorq_m_s8\0"
  "veorq_m_u16\0"
  "veorq_m_u32\0"
  "veorq_m_u8\0"
  "veorq_s16\0"
  "veorq_s32\0"
  "veorq_s8\0"
  "veorq_u16\0"
  "veorq_u32\0"
  "veorq_u8\0"
  "veorq_x_f16\0"
  "veorq_x_f32\0"
  "veorq_x_s16\0"
  "veorq_x_s32\0"
  "veorq_x_s8\0"
  "veorq_x_u16\0"
  "veorq_x_u32\0"
  "veorq_x_u8\0"
  "vfmaq_f16\0"
  "vfmaq_f32\0"
  "vfmaq_m_f16\0"
  "vfmaq_m_f32\0"
  "vfmaq_m_n_f16\0"
  "vfmaq_m_n_f32\0"
  "vfmaq_n_f16\0"
  "vfmaq_n_f32\0"
  "vfmasq_m_n_f16\0"
  "vfmasq_m_n_f32\0"
  "vfmasq_n_f16\0"
  "vfmasq_n_f32\0"
  "vfmsq_f16\0"
  "vfmsq_f32\0"
  "vfmsq_m_f16\0"
  "vfmsq_m_f32\0"
  "vgetq_lane_f16\0"
  "vgetq_lane_f32\0"
  "vgetq_lane_s16\0"
  "vgetq_lane_s32\0"
  "vgetq_lane_s64\0"
  "vgetq_lane_s8\0"
  "vgetq_lane_u16\0"
  "vgetq_lane_u32\0"
  "vgetq_lane_u64\0"
  "vgetq_lane_u8\0"
  "vhaddq_m_n_s16\0"
  "vhaddq_m_n_s32\0"
  "vhaddq_m_n_s8\0"
  "vhaddq_m_n_u16\0"
  "vhaddq_m_n_u32\0"
  "vhaddq_m_n_u8\0"
  "vhaddq_m_s16\0"
  "vhaddq_m_s32\0"
  "vhaddq_m_s8\0"
  "vhaddq_m_u16\0"
  "vhaddq_m_u32\0"
  "vhaddq_m_u8\0"
  "vhaddq_n_s16\0"
  "vhaddq_n_s32\0"
  "vhaddq_n_s8\0"
  "vhaddq_n_u16\0"
  "vhaddq_n_u32\0"
  "vhaddq_n_u8\0"
  "vhaddq_s16\0"
  "vhaddq_s32\0"
  "vhaddq_s8\0"
  "vhaddq_u16\0"
  "vhaddq_u32\0"
  "vhaddq_u8\0"
  "vhaddq_x_n_s16\0"
  "vhaddq_x_n_s32\0"
  "vhaddq_x_n_s8\0"
  "vhaddq_x_n_u16\0"
  "vhaddq_x_n_u32\0"
  "vhaddq_x_n_u8\0"
  "vhaddq_x_s16\0"
  "vhaddq_x_s32\0"
  "vhaddq_x_s8\0"
  "vhaddq_x_u16\0"
  "vhaddq_x_u32\0"
  "vhaddq_x_u8\0"
  "vhcaddq_rot270_m_s16\0"
  "vhcaddq_rot270_m_s32\0"
  "vhcaddq_rot270_m_s8\0"
  "vhcaddq_rot270_s16\0"
  "vhcaddq_rot270_s32\0"
  "vhcaddq_rot270_s8\0"
  "vhcaddq_rot270_x_s16\0"
  "vhcaddq_rot270_x_s32\0"
  "vhcaddq_rot270_x_s8\0"
  "vhcaddq_rot90_m_s16\0"
  "vhcaddq_rot90_m_s32\0"
  "vhcaddq_rot90_m_s8\0"
  "vhcaddq_rot90_s16\0"
  "vhcaddq_rot90_s32\0"
  "vhcaddq_rot90_s8\0"
  "vhcaddq_rot90_x_s16\0"
  "vhcaddq_rot90_x_s32\0"
  "vhcaddq_rot90_x_s8\0"
  "vhsubq_m_n_s16\0"
  "vhsubq_m_n_s32\0"
  "vhsubq_m_n_s8\0"
  "vhsubq_m_n_u16\0"
  "vhsubq_m_n_u32\0"
  "vhsubq_m_n_u8\0"
  "vhsubq_m_s16\0"
  "vhsubq_m_s32\0"
  "vhsubq_m_s8\0"
  "vhsubq_m_u16\0"
  "vhsubq_m_u32\0"
  "vhsubq_m_u8\0"
  "vhsubq_n_s16\0"
  "vhsubq_n_s32\0"
  "vhsubq_n_s8\0"
  "vhsubq_n_u16\0"
  "vhsubq_n_u32\0"
  "vhsubq_n_u8\0"
  "vhsubq_s16\0"
  "vhsubq_s32\0"
  "vhsubq_s8\0"
  "vhsubq_u16\0"
  "vhsubq_u32\0"
  "vhsubq_u8\0"
  "vhsubq_x_n_s16\0"
  "vhsubq_x_n_s32\0"
  "vhsubq_x_n_s8\0"
  "vhsubq_x_n_u16\0"
  "vhsubq_x_n_u32\0"
  "vhsubq_x_n_u8\0"
  "vhsubq_x_s16\0"
  "vhsubq_x_s32\0"
  "vhsubq_x_s8\0"
  "vhsubq_x_u16\0"
  "vhsubq_x_u32\0"
  "vhsubq_x_u8\0"
  "vidupq_m_n_u16\0"
  "vidupq_m_n_u32\0"
  "vidupq_m_n_u8\0"
  "vidupq_m_wb_u16\0"
  "vidupq_m_wb_u32\0"
  "vidupq_m_wb_u8\0"
  "vidupq_n_u16\0"
  "vidupq_n_u32\0"
  "vidupq_n_u8\0"
  "vidupq_wb_u16\0"
  "vidupq_wb_u32\0"
  "vidupq_wb_u8\0"
  "vidupq_x_n_u16\0"
  "vidupq_x_n_u32\0"
  "vidupq_x_n_u8\0"
  "vidupq_x_wb_u16\0"
  "vidupq_x_wb_u32\0"
  "vidupq_x_wb_u8\0"
  "viwdupq_m_n_u16\0"
  "viwdupq_m_n_u32\0"
  "viwdupq_m_n_u8\0"
  "viwdupq_m_wb_u16\0"
  "viwdupq_m_wb_u32\0"
  "viwdupq_m_wb_u8\0"
  "viwdupq_n_u16\0"
  "viwdupq_n_u32\0"
  "viwdupq_n_u8\0"
  "viwdupq_wb_u16\0"
  "viwdupq_wb_u32\0"
  "viwdupq_wb_u8\0"
  "viwdupq_x_n_u16\0"
  "viwdupq_x_n_u32\0"
  "viwdupq_x_n_u8\0"
  "viwdupq_x_wb_u16\0"
  "viwdupq_x_wb_u32\0"
  "viwdupq_x_wb_u8\0"
  "vld1q_f16\0"
  "vld1q_f32\0"
  "vld1q_s16\0"
  "vld1q_s32\0"
  "vld1q_s8\0"
  "vld1q_u16\0"
  "vld1q_u32\0"
  "vld1q_u8\0"
  "vld1q_z_f16\0"
  "vld1q_z_f32\0"
  "vld1q_z_s16\0"
  "vld1q_z_s32\0"
  "vld1q_z_s8\0"
  "vld1q_z_u16\0"
  "vld1q_z_u32\0"
  "vld1q_z_u8\0"
  "vld2q_f16\0"
  "vld2q_f32\0"
  "vld2q_s16\0"
  "vld2q_s32\0"
  "vld2q_s8\0"
  "vld2q_u16\0"
  "vld2q_u32\0"
  "vld2q_u8\0"
  "vld4q_f16\0"
  "vld4q_f32\0"
  "vld4q_s16\0"
  "vld4q_s32\0"
  "vld4q_s8\0"
  "vld4q_u16\0"
  "vld4q_u32\0"
  "vld4q_u8\0"
  "vldrbq_gather_offset_s16\0"
  "vldrbq_gather_offset_s32\0"
  "vldrbq_gather_offset_s8\0"
  "vldrbq_gather_offset_u16\0"
  "vldrbq_gather_offset_u32\0"
  "vldrbq_gather_offset_u8\0"
  "vldrbq_gather_offset_z_s16\0"
  "vldrbq_gather_offset_z_s32\0"
  "vldrbq_gather_offset_z_s8\0"
  "vldrbq_gather_offset_z_u16\0"
  "vldrbq_gather_offset_z_u32\0"
  "vldrbq_gather_offset_z_u8\0"
  "vldrbq_s16\0"
  "vldrbq_s32\0"
  "vldrbq_s8\0"
  "vldrbq_u16\0"
  "vldrbq_u32\0"
  "vldrbq_u8\0"
  "vldrbq_z_s16\0"
  "vldrbq_z_s32\0"
  "vldrbq_z_s8\0"
  "vldrbq_z_u16\0"
  "vldrbq_z_u32\0"
  "vldrbq_z_u8\0"
  "vldrdq_gather_base_s64\0"
  "vldrdq_gather_base_u64\0"
  "vldrdq_gather_base_wb_s64\0"
  "vldrdq_gather_base_wb_u64\0"
  "vldrdq_gather_base_wb_z_s64\0"
  "vldrdq_gather_base_wb_z_u64\0"
  "vldrdq_gather_base_z_s64\0"
  "vldrdq_gather_base_z_u64\0"
  "vldrdq_gather_offset_s64\0"
  "vldrdq_gather_offset_u64\0"
  "vldrdq_gather_offset_z_s64\0"
  "vldrdq_gather_offset_z_u64\0"
  "vldrdq_gather_shifted_offset_s64\0"
  "vldrdq_gather_shifted_offset_u64\0"
  "vldrdq_gather_shifted_offset_z_s64\0"
  "vldrdq_gather_shifted_offset_z_u64\0"
  "vldrhq_f16\0"
  "vldrhq_gather_offset_f16\0"
  "vldrhq_gather_offset_s16\0"
  "vldrhq_gather_offset_s32\0"
  "vldrhq_gather_offset_u16\0"
  "vldrhq_gather_offset_u32\0"
  "vldrhq_gather_offset_z_f16\0"
  "vldrhq_gather_offset_z_s16\0"
  "vldrhq_gather_offset_z_s32\0"
  "vldrhq_gather_offset_z_u16\0"
  "vldrhq_gather_offset_z_u32\0"
  "vldrhq_gather_shifted_offset_f16\0"
  "vldrhq_gather_shifted_offset_s16\0"
  "vldrhq_gather_shifted_offset_s32\0"
  "vldrhq_gather_shifted_offset_u16\0"
  "vldrhq_gather_shifted_offset_u32\0"
  "vldrhq_gather_shifted_offset_z_f16\0"
  "vldrhq_gather_shifted_offset_z_s16\0"
  "vldrhq_gather_shifted_offset_z_s32\0"
  "vldrhq_gather_shifted_offset_z_u16\0"
  "vldrhq_gather_shifted_offset_z_u32\0"
  "vldrhq_s16\0"
  "vldrhq_s32\0"
  "vldrhq_u16\0"
  "vldrhq_u32\0"
  "vldrhq_z_f16\0"
  "vldrhq_z_s16\0"
  "vldrhq_z_s32\0"
  "vldrhq_z_u16\0"
  "vldrhq_z_u32\0"
  "vldrwq_f32\0"
  "vldrwq_gather_base_f32\0"
  "vldrwq_gather_base_s32\0"
  "vldrwq_gather_base_u32\0"
  "vldrwq_gather_base_wb_f32\0"
  "vldrwq_gather_base_wb_s32\0"
  "vldrwq_gather_base_wb_u32\0"
  "vldrwq_gather_base_wb_z_f32\0"
  "vldrwq_gather_base_wb_z_s32\0"
  "vldrwq_gather_base_wb_z_u32\0"
  "vldrwq_gather_base_z_f32\0"
  "vldrwq_gather_base_z_s32\0"
  "vldrwq_gather_base_z_u32\0"
  "vldrwq_gather_offset_f32\0"
  "vldrwq_gather_offset_s32\0"
  "vldrwq_gather_offset_u32\0"
  "vldrwq_gather_offset_z_f32\0"
  "vldrwq_gather_offset_z_s32\0"
  "vldrwq_gather_offset_z_u32\0"
  "vldrwq_gather_shifted_offset_f32\0"
  "vldrwq_gather_shifted_offset_s32\0"
  "vldrwq_gather_shifted_offset_u32\0"
  "vldrwq_gather_shifted_offset_z_f32\0"
  "vldrwq_gather_shifted_offset_z_s32\0"
  "vldrwq_gather_shifted_offset_z_u32\0"
  "vldrwq_s32\0"
  "vldrwq_u32\0"
  "vldrwq_z_f32\0"
  "vldrwq_z_s32\0"
  "vldrwq_z_u32\0"
  "vmaxaq_m_s16\0"
  "vmaxaq_m_s32\0"
  "vmaxaq_m_s8\0"
  "vmaxaq_s16\0"
  "vmaxaq_s32\0"
  "vmaxaq_s8\0"
  "vmaxavq_p_s16\0"
  "vmaxavq_p_s32\0"
  "vmaxavq_p_s8\0"
  "vmaxavq_s16\0"
  "vmaxavq_s32\0"
  "vmaxavq_s8\0"
  "vmaxnmaq_f16\0"
  "vmaxnmaq_f32\0"
  "vmaxnmaq_m_f16\0"
  "vmaxnmaq_m_f32\0"
  "vmaxnmavq_f16\0"
  "vmaxnmavq_f32\0"
  "vmaxnmavq_p_f16\0"
  "vmaxnmavq_p_f32\0"
  "vmaxnmq_f16\0"
  "vmaxnmq_f32\0"
  "vmaxnmq_m_f16\0"
  "vmaxnmq_m_f32\0"
  "vmaxnmq_x_f16\0"
  "vmaxnmq_x_f32\0"
  "vmaxnmvq_f16\0"
  "vmaxnmvq_f32\0"
  "vmaxnmvq_p_f16\0"
  "vmaxnmvq_p_f32\0"
  "vmaxq_m_s16\0"
  "vmaxq_m_s32\0"
  "vmaxq_m_s8\0"
  "vmaxq_m_u16\0"
  "vmaxq_m_u32\0"
  "vmaxq_m_u8\0"
  "vmaxq_s16\0"
  "vmaxq_s32\0"
  "vmaxq_s8\0"
  "vmaxq_u16\0"
  "vmaxq_u32\0"
  "vmaxq_u8\0"
  "vmaxq_x_s16\0"
  "vmaxq_x_s32\0"
  "vmaxq_x_s8\0"
  "vmaxq_x_u16\0"
  "vmaxq_x_u32\0"
  "vmaxq_x_u8\0"
  "vmaxvq_p_s16\0"
  "vmaxvq_p_s32\0"
  "vmaxvq_p_s8\0"
  "vmaxvq_p_u16\0"
  "vmaxvq_p_u32\0"
  "vmaxvq_p_u8\0"
  "vmaxvq_s16\0"
  "vmaxvq_s32\0"
  "vmaxvq_s8\0"
  "vmaxvq_u16\0"
  "vmaxvq_u32\0"
  "vmaxvq_u8\0"
  "vminaq_m_s16\0"
  "vminaq_m_s32\0"
  "vminaq_m_s8\0"
  "vminaq_s16\0"
  "vminaq_s32\0"
  "vminaq_s8\0"
  "vminavq_p_s16\0"
  "vminavq_p_s32\0"
  "vminavq_p_s8\0"
  "vminavq_s16\0"
  "vminavq_s32\0"
  "vminavq_s8\0"
  "vminnmaq_f16\0"
  "vminnmaq_f32\0"
  "vminnmaq_m_f16\0"
  "vminnmaq_m_f32\0"
  "vminnmavq_f16\0"
  "vminnmavq_f32\0"
  "vminnmavq_p_f16\0"
  "vminnmavq_p_f32\0"
  "vminnmq_f16\0"
  "vminnmq_f32\0"
  "vminnmq_m_f16\0"
  "vminnmq_m_f32\0"
  "vminnmq_x_f16\0"
  "vminnmq_x_f32\0"
  "vminnmvq_f16\0"
  "vminnmvq_f32\0"
  "vminnmvq_p_f16\0"
  "vminnmvq_p_f32\0"
  "vminq_m_s16\0"
  "vminq_m_s32\0"
  "vminq_m_s8\0"
  "vminq_m_u16\0"
  "vminq_m_u32\0"
  "vminq_m_u8\0"
  "vminq_s16\0"
  "vminq_s32\0"
  "vminq_s8\0"
  "vminq_u16\0"
  "vminq_u32\0"
  "vminq_u8\0"
  "vminq_x_s16\0"
  "vminq_x_s32\0"
  "vminq_x_s8\0"
  "vminq_x_u16\0"
  "vminq_x_u32\0"
  "vminq_x_u8\0"
  "vminvq_p_s16\0"
  "vminvq_p_s32\0"
  "vminvq_p_s8\0"
  "vminvq_p_u16\0"
  "vminvq_p_u32\0"
  "vminvq_p_u8\0"
  "vminvq_s16\0"
  "vminvq_s32\0"
  "vminvq_s8\0"
  "vminvq_u16\0"
  "vminvq_u32\0"
  "vminvq_u8\0"
  "vmladavaq_p_s16\0"
  "vmladavaq_p_s32\0"
  "vmladavaq_p_s8\0"
  "vmladavaq_p_u16\0"
  "vmladavaq_p_u32\0"
  "vmladavaq_p_u8\0"
  "vmladavaq_s16\0"
  "vmladavaq_s32\0"
  "vmladavaq_s8\0"
  "vmladavaq_u16\0"
  "vmladavaq_u32\0"
  "vmladavaq_u8\0"
  "vmladavaxq_p_s16\0"
  "vmladavaxq_p_s32\0"
  "vmladavaxq_p_s8\0"
  "vmladavaxq_s16\0"
  "vmladavaxq_s32\0"
  "vmladavaxq_s8\0"
  "vmladavq_p_s16\0"
  "vmladavq_p_s32\0"
  "vmladavq_p_s8\0"
  "vmladavq_p_u16\0"
  "vmladavq_p_u32\0"
  "vmladavq_p_u8\0"
  "vmladavq_s16\0"
  "vmladavq_s32\0"
  "vmladavq_s8\0"
  "vmladavq_u16\0"
  "vmladavq_u32\0"
  "vmladavq_u8\0"
  "vmladavxq_p_s16\0"
  "vmladavxq_p_s32\0"
  "vmladavxq_p_s8\0"
  "vmladavxq_s16\0"
  "vmladavxq_s32\0"
  "vmladavxq_s8\0"
  "vmlaldavaq_p_s16\0"
  "vmlaldavaq_p_s32\0"
  "vmlaldavaq_p_u16\0"
  "vmlaldavaq_p_u32\0"
  "vmlaldavaq_s16\0"
  "vmlaldavaq_s32\0"
  "vmlaldavaq_u16\0"
  "vmlaldavaq_u32\0"
  "vmlaldavaxq_p_s16\0"
  "vmlaldavaxq_p_s32\0"
  "vmlaldavaxq_s16\0"
  "vmlaldavaxq_s32\0"
  "vmlaldavq_p_s16\0"
  "vmlaldavq_p_s32\0"
  "vmlaldavq_p_u16\0"
  "vmlaldavq_p_u32\0"
  "vmlaldavq_s16\0"
  "vmlaldavq_s32\0"
  "vmlaldavq_u16\0"
  "vmlaldavq_u32\0"
  "vmlaldavxq_p_s16\0"
  "vmlaldavxq_p_s32\0"
  "vmlaldavxq_s16\0"
  "vmlaldavxq_s32\0"
  "vmlaq_m_n_s16\0"
  "vmlaq_m_n_s32\0"
  "vmlaq_m_n_s8\0"
  "vmlaq_m_n_u16\0"
  "vmlaq_m_n_u32\0"
  "vmlaq_m_n_u8\0"
  "vmlaq_n_s16\0"
  "vmlaq_n_s32\0"
  "vmlaq_n_s8\0"
  "vmlaq_n_u16\0"
  "vmlaq_n_u32\0"
  "vmlaq_n_u8\0"
  "vmlasq_m_n_s16\0"
  "vmlasq_m_n_s32\0"
  "vmlasq_m_n_s8\0"
  "vmlasq_m_n_u16\0"
  "vmlasq_m_n_u32\0"
  "vmlasq_m_n_u8\0"
  "vmlasq_n_s16\0"
  "vmlasq_n_s32\0"
  "vmlasq_n_s8\0"
  "vmlasq_n_u16\0"
  "vmlasq_n_u32\0"
  "vmlasq_n_u8\0"
  "vmlsdavaq_p_s16\0"
  "vmlsdavaq_p_s32\0"
  "vmlsdavaq_p_s8\0"
  "vmlsdavaq_s16\0"
  "vmlsdavaq_s32\0"
  "vmlsdavaq_s8\0"
  "vmlsdavaxq_p_s16\0"
  "vmlsdavaxq_p_s32\0"
  "vmlsdavaxq_p_s8\0"
  "vmlsdavaxq_s16\0"
  "vmlsdavaxq_s32\0"
  "vmlsdavaxq_s8\0"
  "vmlsdavq_p_s16\0"
  "vmlsdavq_p_s32\0"
  "vmlsdavq_p_s8\0"
  "vmlsdavq_s16\0"
  "vmlsdavq_s32\0"
  "vmlsdavq_s8\0"
  "vmlsdavxq_p_s16\0"
  "vmlsdavxq_p_s32\0"
  "vmlsdavxq_p_s8\0"
  "vmlsdavxq_s16\0"
  "vmlsdavxq_s32\0"
  "vmlsdavxq_s8\0"
  "vmlsldavaq_p_s16\0"
  "vmlsldavaq_p_s32\0"
  "vmlsldavaq_s16\0"
  "vmlsldavaq_s32\0"
  "vmlsldavaxq_p_s16\0"
  "vmlsldavaxq_p_s32\0"
  "vmlsldavaxq_s16\0"
  "vmlsldavaxq_s32\0"
  "vmlsldavq_p_s16\0"
  "vmlsldavq_p_s32\0"
  "vmlsldavq_s16\0"
  "vmlsldavq_s32\0"
  "vmlsldavxq_p_s16\0"
  "vmlsldavxq_p_s32\0"
  "vmlsldavxq_s16\0"
  "vmlsldavxq_s32\0"
  "vmovlbq_m_s16\0"
  "vmovlbq_m_s8\0"
  "vmovlbq_m_u16\0"
  "vmovlbq_m_u8\0"
  "vmovlbq_s16\0"
  "vmovlbq_s8\0"
  "vmovlbq_u16\0"
  "vmovlbq_u8\0"
  "vmovlbq_x_s16\0"
  "vmovlbq_x_s8\0"
  "vmovlbq_x_u16\0"
  "vmovlbq_x_u8\0"
  "vmovltq_m_s16\0"
  "vmovltq_m_s8\0"
  "vmovltq_m_u16\0"
  "vmovltq_m_u8\0"
  "vmovltq_s16\0"
  "vmovltq_s8\0"
  "vmovltq_u16\0"
  "vmovltq_u8\0"
  "vmovltq_x_s16\0"
  "vmovltq_x_s8\0"
  "vmovltq_x_u16\0"
  "vmovltq_x_u8\0"
  "vmovnbq_m_s16\0"
  "vmovnbq_m_s32\0"
  "vmovnbq_m_u16\0"
  "vmovnbq_m_u32\0"
  "vmovnbq_s16\0"
  "vmovnbq_s32\0"
  "vmovnbq_u16\0"
  "vmovnbq_u32\0"
  "vmovntq_m_s16\0"
  "vmovntq_m_s32\0"
  "vmovntq_m_u16\0"
  "vmovntq_m_u32\0"
  "vmovntq_s16\0"
  "vmovntq_s32\0"
  "vmovntq_u16\0"
  "vmovntq_u32\0"
  "vmulhq_m_s16\0"
  "vmulhq_m_s32\0"
  "vmulhq_m_s8\0"
  "vmulhq_m_u16\0"
  "vmulhq_m_u32\0"
  "vmulhq_m_u8\0"
  "vmulhq_s16\0"
  "vmulhq_s32\0"
  "vmulhq_s8\0"
  "vmulhq_u16\0"
  "vmulhq_u32\0"
  "vmulhq_u8\0"
  "vmulhq_x_s16\0"
  "vmulhq_x_s32\0"
  "vmulhq_x_s8\0"
  "vmulhq_x_u16\0"
  "vmulhq_x_u32\0"
  "vmulhq_x_u8\0"
  "vmullbq_int_m_s16\0"
  "vmullbq_int_m_s32\0"
  "vmullbq_int_m_s8\0"
  "vmullbq_int_m_u16\0"
  "vmullbq_int_m_u32\0"
  "vmullbq_int_m_u8\0"
  "vmullbq_int_s16\0"
  "vmullbq_int_s32\0"
  "vmullbq_int_s8\0"
  "vmullbq_int_u16\0"
  "vmullbq_int_u32\0"
  "vmullbq_int_u8\0"
  "vmullbq_int_x_s16\0"
  "vmullbq_int_x_s32\0"
  "vmullbq_int_x_s8\0"
  "vmullbq_int_x_u16\0"
  "vmullbq_int_x_u32\0"
  "vmullbq_int_x_u8\0"
  "vmullbq_poly_m_p16\0"
  "vmullbq_poly_m_p8\0"
  "vmullbq_poly_p16\0"
  "vmullbq_poly_p8\0"
  "vmullbq_poly_x_p16\0"
  "vmullbq_poly_x_p8\0"
  "vmulltq_int_m_s16\0"
  "vmulltq_int_m_s32\0"
  "vmulltq_int_m_s8\0"
  "vmulltq_int_m_u16\0"
  "vmulltq_int_m_u32\0"
  "vmulltq_int_m_u8\0"
  "vmulltq_int_s16\0"
  "vmulltq_int_s32\0"
  "vmulltq_int_s8\0"
  "vmulltq_int_u16\0"
  "vmulltq_int_u32\0"
  "vmulltq_int_u8\0"
  "vmulltq_int_x_s16\0"
  "vmulltq_int_x_s32\0"
  "vmulltq_int_x_s8\0"
  "vmulltq_int_x_u16\0"
  "vmulltq_int_x_u32\0"
  "vmulltq_int_x_u8\0"
  "vmulltq_poly_m_p16\0"
  "vmulltq_poly_m_p8\0"
  "vmulltq_poly_p16\0"
  "vmulltq_poly_p8\0"
  "vmulltq_poly_x_p16\0"
  "vmulltq_poly_x_p8\0"
  "vmulq_f16\0"
  "vmulq_f32\0"
  "vmulq_m_f16\0"
  "vmulq_m_f32\0"
  "vmulq_m_n_f16\0"
  "vmulq_m_n_f32\0"
  "vmulq_m_n_s16\0"
  "vmulq_m_n_s32\0"
  "vmulq_m_n_s8\0"
  "vmulq_m_n_u16\0"
  "vmulq_m_n_u32\0"
  "vmulq_m_n_u8\0"
  "vmulq_m_s16\0"
  "vmulq_m_s32\0"
  "vmulq_m_s8\0"
  "vmulq_m_u16\0"
  "vmulq_m_u32\0"
  "vmulq_m_u8\0"
  "vmulq_n_f16\0"
  "vmulq_n_f32\0"
  "vmulq_n_s16\0"
  "vmulq_n_s32\0"
  "vmulq_n_s8\0"
  "vmulq_n_u16\0"
  "vmulq_n_u32\0"
  "vmulq_n_u8\0"
  "vmulq_s16\0"
  "vmulq_s32\0"
  "vmulq_s8\0"
  "vmulq_u16\0"
  "vmulq_u32\0"
  "vmulq_u8\0"
  "vmulq_x_f16\0"
  "vmulq_x_f32\0"
  "vmulq_x_n_f16\0"
  "vmulq_x_n_f32\0"
  "vmulq_x_n_s16\0"
  "vmulq_x_n_s32\0"
  "vmulq_x_n_s8\0"
  "vmulq_x_n_u16\0"
  "vmulq_x_n_u32\0"
  "vmulq_x_n_u8\0"
  "vmulq_x_s16\0"
  "vmulq_x_s32\0"
  "vmulq_x_s8\0"
  "vmulq_x_u16\0"
  "vmulq_x_u32\0"
  "vmulq_x_u8\0"
  "vmvnq_m_n_s16\0"
  "vmvnq_m_n_s32\0"
  "vmvnq_m_n_u16\0"
  "vmvnq_m_n_u32\0"
  "vmvnq_m_s16\0"
  "vmvnq_m_s32\0"
  "vmvnq_m_s8\0"
  "vmvnq_m_u16\0"
  "vmvnq_m_u32\0"
  "vmvnq_m_u8\0"
  "vmvnq_n_s16\0"
  "vmvnq_n_s32\0"
  "vmvnq_n_u16\0"
  "vmvnq_n_u32\0"
  "vmvnq_s16\0"
  "vmvnq_s32\0"
  "vmvnq_s8\0"
  "vmvnq_u16\0"
  "vmvnq_u32\0"
  "vmvnq_u8\0"
  "vmvnq_x_n_s16\0"
  "vmvnq_x_n_s32\0"
  "vmvnq_x_n_u16\0"
  "vmvnq_x_n_u32\0"
  "vmvnq_x_s16\0"
  "vmvnq_x_s32\0"
  "vmvnq_x_s8\0"
  "vmvnq_x_u16\0"
  "vmvnq_x_u32\0"
  "vmvnq_x_u8\0"
  "vnegq_f16\0"
  "vnegq_f32\0"
  "vnegq_m_f16\0"
  "vnegq_m_f32\0"
  "vnegq_m_s16\0"
  "vnegq_m_s32\0"
  "vnegq_m_s8\0"
  "vnegq_s16\0"
  "vnegq_s32\0"
  "vnegq_s8\0"
  "vnegq_x_f16\0"
  "vnegq_x_f32\0"
  "vnegq_x_s16\0"
  "vnegq_x_s32\0"
  "vnegq_x_s8\0"
  "vornq_f16\0"
  "vornq_f32\0"
  "vornq_m_f16\0"
  "vornq_m_f32\0"
  "vornq_m_s16\0"
  "vornq_m_s32\0"
  "vornq_m_s8\0"
  "vornq_m_u16\0"
  "vornq_m_u32\0"
  "vornq_m_u8\0"
  "vornq_s16\0"
  "vornq_s32\0"
  "vornq_s8\0"
  "vornq_u16\0"
  "vornq_u32\0"
  "vornq_u8\0"
  "vornq_x_f16\0"
  "vornq_x_f32\0"
  "vornq_x_s16\0"
  "vornq_x_s32\0"
  "vornq_x_s8\0"
  "vornq_x_u16\0"
  "vornq_x_u32\0"
  "vornq_x_u8\0"
  "vorrq_f16\0"
  "vorrq_f32\0"
  "vorrq_m_f16\0"
  "vorrq_m_f32\0"
  "vorrq_m_n_s16\0"
  "vorrq_m_n_s32\0"
  "vorrq_m_n_u16\0"
  "vorrq_m_n_u32\0"
  "vorrq_m_s16\0"
  "vorrq_m_s32\0"
  "vorrq_m_s8\0"
  "vorrq_m_u16\0"
  "vorrq_m_u32\0"
  "vorrq_m_u8\0"
  "vorrq_n_s16\0"
  "vorrq_n_s32\0"
  "vorrq_n_u16\0"
  "vorrq_n_u32\0"
  "vorrq_s16\0"
  "vorrq_s32\0"
  "vorrq_s8\0"
  "vorrq_u16\0"
  "vorrq_u32\0"
  "vorrq_u8\0"
  "vorrq_x_f16\0"
  "vorrq_x_f32\0"
  "vorrq_x_s16\0"
  "vorrq_x_s32\0"
  "vorrq_x_s8\0"
  "vorrq_x_u16\0"
  "vorrq_x_u32\0"
  "vorrq_x_u8\0"
  "vpnot\0"
  "vpselq_f16\0"
  "vpselq_f32\0"
  "vpselq_s16\0"
  "vpselq_s32\0"
  "vpselq_s64\0"
  "vpselq_s8\0"
  "vpselq_u16\0"
  "vpselq_u32\0"
  "vpselq_u64\0"
  "vpselq_u8\0"
  "vqabsq_m_s16\0"
  "vqabsq_m_s32\0"
  "vqabsq_m_s8\0"
  "vqabsq_s16\0"
  "vqabsq_s32\0"
  "vqabsq_s8\0"
  "vqaddq_m_n_s16\0"
  "vqaddq_m_n_s32\0"
  "vqaddq_m_n_s8\0"
  "vqaddq_m_n_u16\0"
  "vqaddq_m_n_u32\0"
  "vqaddq_m_n_u8\0"
  "vqaddq_m_s16\0"
  "vqaddq_m_s32\0"
  "vqaddq_m_s8\0"
  "vqaddq_m_u16\0"
  "vqaddq_m_u32\0"
  "vqaddq_m_u8\0"
  "vqaddq_n_s16\0"
  "vqaddq_n_s32\0"
  "vqaddq_n_s8\0"
  "vqaddq_n_u16\0"
  "vqaddq_n_u32\0"
  "vqaddq_n_u8\0"
  "vqaddq_s16\0"
  "vqaddq_s32\0"
  "vqaddq_s8\0"
  "vqaddq_u16\0"
  "vqaddq_u32\0"
  "vqaddq_u8\0"
  "vqdmladhq_m_s16\0"
  "vqdmladhq_m_s32\0"
  "vqdmladhq_m_s8\0"
  "vqdmladhq_s16\0"
  "vqdmladhq_s32\0"
  "vqdmladhq_s8\0"
  "vqdmladhxq_m_s16\0"
  "vqdmladhxq_m_s32\0"
  "vqdmladhxq_m_s8\0"
  "vqdmladhxq_s16\0"
  "vqdmladhxq_s32\0"
  "vqdmladhxq_s8\0"
  "vqdmlahq_m_n_s16\0"
  "vqdmlahq_m_n_s32\0"
  "vqdmlahq_m_n_s8\0"
  "vqdmlahq_n_s16\0"
  "vqdmlahq_n_s32\0"
  "vqdmlahq_n_s8\0"
  "vqdmlashq_m_n_s16\0"
  "vqdmlashq_m_n_s32\0"
  "vqdmlashq_m_n_s8\0"
  "vqdmlashq_n_s16\0"
  "vqdmlashq_n_s32\0"
  "vqdmlashq_n_s8\0"
  "vqdmlsdhq_m_s16\0"
  "vqdmlsdhq_m_s32\0"
  "vqdmlsdhq_m_s8\0"
  "vqdmlsdhq_s16\0"
  "vqdmlsdhq_s32\0"
  "vqdmlsdhq_s8\0"
  "vqdmlsdhxq_m_s16\0"
  "vqdmlsdhxq_m_s32\0"
  "vqdmlsdhxq_m_s8\0"
  "vqdmlsdhxq_s16\0"
  "vqdmlsdhxq_s32\0"
  "vqdmlsdhxq_s8\0"
  "vqdmulhq_m_n_s16\0"
  "vqdmulhq_m_n_s32\0"
  "vqdmulhq_m_n_s8\0"
  "vqdmulhq_m_s16\0"
  "vqdmulhq_m_s32\0"
  "vqdmulhq_m_s8\0"
  "vqdmulhq_n_s16\0"
  "vqdmulhq_n_s32\0"
  "vqdmulhq_n_s8\0"
  "vqdmulhq_s16\0"
  "vqdmulhq_s32\0"
  "vqdmulhq_s8\0"
  "vqdmullbq_m_n_s16\0"
  "vqdmullbq_m_n_s32\0"
  "vqdmullbq_m_s16\0"
  "vqdmullbq_m_s32\0"
  "vqdmullbq_n_s16\0"
  "vqdmullbq_n_s32\0"
  "vqdmullbq_s16\0"
  "vqdmullbq_s32\0"
  "vqdmulltq_m_n_s16\0"
  "vqdmulltq_m_n_s32\0"
  "vqdmulltq_m_s16\0"
  "vqdmulltq_m_s32\0"
  "vqdmulltq_n_s16\0"
  "vqdmulltq_n_s32\0"
  "vqdmulltq_s16\0"
  "vqdmulltq_s32\0"
  "vqmovnbq_m_s16\0"
  "vqmovnbq_m_s32\0"
  "vqmovnbq_m_u16\0"
  "vqmovnbq_m_u32\0"
  "vqmovnbq_s16\0"
  "vqmovnbq_s32\0"
  "vqmovnbq_u16\0"
  "vqmovnbq_u32\0"
  "vqmovntq_m_s16\0"
  "vqmovntq_m_s32\0"
  "vqmovntq_m_u16\0"
  "vqmovntq_m_u32\0"
  "vqmovntq_s16\0"
  "vqmovntq_s32\0"
  "vqmovntq_u16\0"
  "vqmovntq_u32\0"
  "vqmovunbq_m_s16\0"
  "vqmovunbq_m_s32\0"
  "vqmovunbq_s16\0"
  "vqmovunbq_s32\0"
  "vqmovuntq_m_s16\0"
  "vqmovuntq_m_s32\0"
  "vqmovuntq_s16\0"
  "vqmovuntq_s32\0"
  "vqnegq_m_s16\0"
  "vqnegq_m_s32\0"
  "vqnegq_m_s8\0"
  "vqnegq_s16\0"
  "vqnegq_s32\0"
  "vqnegq_s8\0"
  "vqrdmladhq_m_s16\0"
  "vqrdmladhq_m_s32\0"
  "vqrdmladhq_m_s8\0"
  "vqrdmladhq_s16\0"
  "vqrdmladhq_s32\0"
  "vqrdmladhq_s8\0"
  "vqrdmladhxq_m_s16\0"
  "vqrdmladhxq_m_s32\0"
  "vqrdmladhxq_m_s8\0"
  "vqrdmladhxq_s16\0"
  "vqrdmladhxq_s32\0"
  "vqrdmladhxq_s8\0"
  "vqrdmlahq_m_n_s16\0"
  "vqrdmlahq_m_n_s32\0"
  "vqrdmlahq_m_n_s8\0"
  "vqrdmlahq_n_s16\0"
  "vqrdmlahq_n_s32\0"
  "vqrdmlahq_n_s8\0"
  "vqrdmlashq_m_n_s16\0"
  "vqrdmlashq_m_n_s32\0"
  "vqrdmlashq_m_n_s8\0"
  "vqrdmlashq_n_s16\0"
  "vqrdmlashq_n_s32\0"
  "vqrdmlashq_n_s8\0"
  "vqrdmlsdhq_m_s16\0"
  "vqrdmlsdhq_m_s32\0"
  "vqrdmlsdhq_m_s8\0"
  "vqrdmlsdhq_s16\0"
  "vqrdmlsdhq_s32\0"
  "vqrdmlsdhq_s8\0"
  "vqrdmlsdhxq_m_s16\0"
  "vqrdmlsdhxq_m_s32\0"
  "vqrdmlsdhxq_m_s8\0"
  "vqrdmlsdhxq_s16\0"
  "vqrdmlsdhxq_s32\0"
  "vqrdmlsdhxq_s8\0"
  "vqrdmulhq_m_n_s16\0"
  "vqrdmulhq_m_n_s32\0"
  "vqrdmulhq_m_n_s8\0"
  "vqrdmulhq_m_s16\0"
  "vqrdmulhq_m_s32\0"
  "vqrdmulhq_m_s8\0"
  "vqrdmulhq_n_s16\0"
  "vqrdmulhq_n_s32\0"
  "vqrdmulhq_n_s8\0"
  "vqrdmulhq_s16\0"
  "vqrdmulhq_s32\0"
  "vqrdmulhq_s8\0"
  "vqrshlq_m_n_s16\0"
  "vqrshlq_m_n_s32\0"
  "vqrshlq_m_n_s8\0"
  "vqrshlq_m_n_u16\0"
  "vqrshlq_m_n_u32\0"
  "vqrshlq_m_n_u8\0"
  "vqrshlq_m_s16\0"
  "vqrshlq_m_s32\0"
  "vqrshlq_m_s8\0"
  "vqrshlq_m_u16\0"
  "vqrshlq_m_u32\0"
  "vqrshlq_m_u8\0"
  "vqrshlq_n_s16\0"
  "vqrshlq_n_s32\0"
  "vqrshlq_n_s8\0"
  "vqrshlq_n_u16\0"
  "vqrshlq_n_u32\0"
  "vqrshlq_n_u8\0"
  "vqrshlq_s16\0"
  "vqrshlq_s32\0"
  "vqrshlq_s8\0"
  "vqrshlq_u16\0"
  "vqrshlq_u32\0"
  "vqrshlq_u8\0"
  "vqrshrnbq_m_n_s16\0"
  "vqrshrnbq_m_n_s32\0"
  "vqrshrnbq_m_n_u16\0"
  "vqrshrnbq_m_n_u32\0"
  "vqrshrnbq_n_s16\0"
  "vqrshrnbq_n_s32\0"
  "vqrshrnbq_n_u16\0"
  "vqrshrnbq_n_u32\0"
  "vqrshrntq_m_n_s16\0"
  "vqrshrntq_m_n_s32\0"
  "vqrshrntq_m_n_u16\0"
  "vqrshrntq_m_n_u32\0"
  "vqrshrntq_n_s16\0"
  "vqrshrntq_n_s32\0"
  "vqrshrntq_n_u16\0"
  "vqrshrntq_n_u32\0"
  "vqrshrunbq_m_n_s16\0"
  "vqrshrunbq_m_n_s32\0"
  "vqrshrunbq_n_s16\0"
  "vqrshrunbq_n_s32\0"
  "vqrshruntq_m_n_s16\0"
  "vqrshruntq_m_n_s32\0"
  "vqrshruntq_n_s16\0"
  "vqrshruntq_n_s32\0"
  "vqshlq_m_n_s16\0"
  "vqshlq_m_n_s32\0"
  "vqshlq_m_n_s8\0"
  "vqshlq_m_n_u16\0"
  "vqshlq_m_n_u32\0"
  "vqshlq_m_n_u8\0"
  "vqshlq_m_r_s16\0"
  "vqshlq_m_r_s32\0"
  "vqshlq_m_r_s8\0"
  "vqshlq_m_r_u16\0"
  "vqshlq_m_r_u32\0"
  "vqshlq_m_r_u8\0"
  "vqshlq_m_s16\0"
  "vqshlq_m_s32\0"
  "vqshlq_m_s8\0"
  "vqshlq_m_u16\0"
  "vqshlq_m_u32\0"
  "vqshlq_m_u8\0"
  "vqshlq_n_s16\0"
  "vqshlq_n_s32\0"
  "vqshlq_n_s8\0"
  "vqshlq_n_u16\0"
  "vqshlq_n_u32\0"
  "vqshlq_n_u8\0"
  "vqshlq_r_s16\0"
  "vqshlq_r_s32\0"
  "vqshlq_r_s8\0"
  "vqshlq_r_u16\0"
  "vqshlq_r_u32\0"
  "vqshlq_r_u8\0"
  "vqshlq_s16\0"
  "vqshlq_s32\0"
  "vqshlq_s8\0"
  "vqshlq_u16\0"
  "vqshlq_u32\0"
  "vqshlq_u8\0"
  "vqshluq_m_n_s16\0"
  "vqshluq_m_n_s32\0"
  "vqshluq_m_n_s8\0"
  "vqshluq_n_s16\0"
  "vqshluq_n_s32\0"
  "vqshluq_n_s8\0"
  "vqshrnbq_m_n_s16\0"
  "vqshrnbq_m_n_s32\0"
  "vqshrnbq_m_n_u16\0"
  "vqshrnbq_m_n_u32\0"
  "vqshrnbq_n_s16\0"
  "vqshrnbq_n_s32\0"
  "vqshrnbq_n_u16\0"
  "vqshrnbq_n_u32\0"
  "vqshrntq_m_n_s16\0"
  "vqshrntq_m_n_s32\0"
  "vqshrntq_m_n_u16\0"
  "vqshrntq_m_n_u32\0"
  "vqshrntq_n_s16\0"
  "vqshrntq_n_s32\0"
  "vqshrntq_n_u16\0"
  "vqshrntq_n_u32\0"
  "vqshrunbq_m_n_s16\0"
  "vqshrunbq_m_n_s32\0"
  "vqshrunbq_n_s16\0"
  "vqshrunbq_n_s32\0"
  "vqshruntq_m_n_s16\0"
  "vqshruntq_m_n_s32\0"
  "vqshruntq_n_s16\0"
  "vqshruntq_n_s32\0"
  "vqsubq_m_n_s16\0"
  "vqsubq_m_n_s32\0"
  "vqsubq_m_n_s8\0"
  "vqsubq_m_n_u16\0"
  "vqsubq_m_n_u32\0"
  "vqsubq_m_n_u8\0"
  "vqsubq_m_s16\0"
  "vqsubq_m_s32\0"
  "vqsubq_m_s8\0"
  "vqsubq_m_u16\0"
  "vqsubq_m_u32\0"
  "vqsubq_m_u8\0"
  "vqsubq_n_s16\0"
  "vqsubq_n_s32\0"
  "vqsubq_n_s8\0"
  "vqsubq_n_u16\0"
  "vqsubq_n_u32\0"
  "vqsubq_n_u8\0"
  "vqsubq_s16\0"
  "vqsubq_s32\0"
  "vqsubq_s8\0"
  "vqsubq_u16\0"
  "vqsubq_u32\0"
  "vqsubq_u8\0"
  "vreinterpretq_f16_f32\0"
  "vreinterpretq_f16_s16\0"
  "vreinterpretq_f16_s32\0"
  "vreinterpretq_f16_s64\0"
  "vreinterpretq_f16_s8\0"
  "vreinterpretq_f16_u16\0"
  "vreinterpretq_f16_u32\0"
  "vreinterpretq_f16_u64\0"
  "vreinterpretq_f16_u8\0"
  "vreinterpretq_f32_f16\0"
  "vreinterpretq_f32_s16\0"
  "vreinterpretq_f32_s32\0"
  "vreinterpretq_f32_s64\0"
  "vreinterpretq_f32_s8\0"
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  "vstrdq_scatter_offset_p_u64\0"
  "vstrdq_scatter_offset_s64\0"
  "vstrdq_scatter_offset_u64\0"
  "vstrdq_scatter_shifted_offset_p_s64\0"
  "vstrdq_scatter_shifted_offset_p_u64\0"
  "vstrdq_scatter_shifted_offset_s64\0"
  "vstrdq_scatter_shifted_offset_u64\0"
  "vstrhq_f16\0"
  "vstrhq_p_f16\0"
  "vstrhq_p_s16\0"
  "vstrhq_p_s32\0"
  "vstrhq_p_u16\0"
  "vstrhq_p_u32\0"
  "vstrhq_s16\0"
  "vstrhq_s32\0"
  "vstrhq_scatter_offset_f16\0"
  "vstrhq_scatter_offset_p_f16\0"
  "vstrhq_scatter_offset_p_s16\0"
  "vstrhq_scatter_offset_p_s32\0"
  "vstrhq_scatter_offset_p_u16\0"
  "vstrhq_scatter_offset_p_u32\0"
  "vstrhq_scatter_offset_s16\0"
  "vstrhq_scatter_offset_s32\0"
  "vstrhq_scatter_offset_u16\0"
  "vstrhq_scatter_offset_u32\0"
  "vstrhq_scatter_shifted_offset_f16\0"
  "vstrhq_scatter_shifted_offset_p_f16\0"
  "vstrhq_scatter_shifted_offset_p_s16\0"
  "vstrhq_scatter_shifted_offset_p_s32\0"
  "vstrhq_scatter_shifted_offset_p_u16\0"
  "vstrhq_scatter_shifted_offset_p_u32\0"
  "vstrhq_scatter_shifted_offset_s16\0"
  "vstrhq_scatter_shifted_offset_s32\0"
  "vstrhq_scatter_shifted_offset_u16\0"
  "vstrhq_scatter_shifted_offset_u32\0"
  "vstrhq_u16\0"
  "vstrhq_u32\0"
  "vstrwq_f32\0"
  "vstrwq_p_f32\0"
  "vstrwq_p_s32\0"
  "vstrwq_p_u32\0"
  "vstrwq_s32\0"
  "vstrwq_scatter_base_f32\0"
  "vstrwq_scatter_base_p_f32\0"
  "vstrwq_scatter_base_p_s32\0"
  "vstrwq_scatter_base_p_u32\0"
  "vstrwq_scatter_base_s32\0"
  "vstrwq_scatter_base_u32\0"
  "vstrwq_scatter_base_wb_f32\0"
  "vstrwq_scatter_base_wb_p_f32\0"
  "vstrwq_scatter_base_wb_p_s32\0"
  "vstrwq_scatter_base_wb_p_u32\0"
  "vstrwq_scatter_base_wb_s32\0"
  "vstrwq_scatter_base_wb_u32\0"
  "vstrwq_scatter_offset_f32\0"
  "vstrwq_scatter_offset_p_f32\0"
  "vstrwq_scatter_offset_p_s32\0"
  "vstrwq_scatter_offset_p_u32\0"
  "vstrwq_scatter_offset_s32\0"
  "vstrwq_scatter_offset_u32\0"
  "vstrwq_scatter_shifted_offset_f32\0"
  "vstrwq_scatter_shifted_offset_p_f32\0"
  "vstrwq_scatter_shifted_offset_p_s32\0"
  "vstrwq_scatter_shifted_offset_p_u32\0"
  "vstrwq_scatter_shifted_offset_s32\0"
  "vstrwq_scatter_shifted_offset_u32\0"
  "vstrwq_u32\0"
  "vsubq_f16\0"
  "vsubq_f32\0"
  "vsubq_m_f16\0"
  "vsubq_m_f32\0"
  "vsubq_m_n_f16\0"
  "vsubq_m_n_f32\0"
  "vsubq_m_n_s16\0"
  "vsubq_m_n_s32\0"
  "vsubq_m_n_s8\0"
  "vsubq_m_n_u16\0"
  "vsubq_m_n_u32\0"
  "vsubq_m_n_u8\0"
  "vsubq_m_s16\0"
  "vsubq_m_s32\0"
  "vsubq_m_s8\0"
  "vsubq_m_u16\0"
  "vsubq_m_u32\0"
  "vsubq_m_u8\0"
  "vsubq_n_f16\0"
  "vsubq_n_f32\0"
  "vsubq_n_s16\0"
  "vsubq_n_s32\0"
  "vsubq_n_s8\0"
  "vsubq_n_u16\0"
  "vsubq_n_u32\0"
  "vsubq_n_u8\0"
  "vsubq_s16\0"
  "vsubq_s32\0"
  "vsubq_s8\0"
  "vsubq_u16\0"
  "vsubq_u32\0"
  "vsubq_u8\0"
  "vsubq_x_f16\0"
  "vsubq_x_f32\0"
  "vsubq_x_n_f16\0"
  "vsubq_x_n_f32\0"
  "vsubq_x_n_s16\0"
  "vsubq_x_n_s32\0"
  "vsubq_x_n_s8\0"
  "vsubq_x_n_u16\0"
  "vsubq_x_n_u32\0"
  "vsubq_x_n_u8\0"
  "vsubq_x_s16\0"
  "vsubq_x_s32\0"
  "vsubq_x_s8\0"
  "vsubq_x_u16\0"
  "vsubq_x_u32\0"
  "vsubq_x_u8\0"
  "vuninitializedq_f16\0"
  "vuninitializedq_f32\0"
  "vuninitializedq_polymorphic_f16\0"
  "vuninitializedq_polymorphic_f32\0"
  "vuninitializedq_polymorphic_s16\0"
  "vuninitializedq_polymorphic_s32\0"
  "vuninitializedq_polymorphic_s64\0"
  "vuninitializedq_polymorphic_s8\0"
  "vuninitializedq_polymorphic_u16\0"
  "vuninitializedq_polymorphic_u32\0"
  "vuninitializedq_polymorphic_u64\0"
  "vuninitializedq_polymorphic_u8\0"
  "vuninitializedq_s16\0"
  "vuninitializedq_s32\0"
  "vuninitializedq_s64\0"
  "vuninitializedq_s8\0"
  "vuninitializedq_u16\0"
  "vuninitializedq_u32\0"
  "vuninitializedq_u64\0"
  "vuninitializedq_u8\0"
  "vabavq_p\0"
  "vabavq\0"
  "vabdq\0"
  "vabdq_m\0"
  "vabdq_x\0"
  "vabsq\0"
  "vabsq_m\0"
  "vabsq_x\0"
  "vadciq_m\0"
  "vadciq\0"
  "vadcq_m\0"
  "vadcq\0"
  "vaddlvaq_p\0"
  "vaddlvaq\0"
  "vaddlvq_p\0"
  "vaddlvq\0"
  "vaddq\0"
  "vaddq_m\0"
  "vaddq_x\0"
  "vaddvaq_p\0"
  "vaddvaq\0"
  "vaddvq_p\0"
  "vaddvq\0"
  "vandq\0"
  "vandq_m\0"
  "vandq_x\0"
  "vbicq\0"
  "vbicq_m\0"
  "vbicq_m_n\0"
  "vbicq_x\0"
  "vbrsrq_m\0"
  "vbrsrq\0"
  "vbrsrq_x\0"
  "vcaddq_rot270\0"
  "vcaddq_rot270_m\0"
  "vcaddq_rot270_x\0"
  "vcaddq_rot90\0"
  "vcaddq_rot90_m\0"
  "vcaddq_rot90_x\0"
  "vclsq_m\0"
  "vclsq\0"
  "vclsq_x\0"
  "vclzq_m\0"
  "vclzq\0"
  "vclzq_x\0"
  "vcmlaq\0"
  "vcmlaq_m\0"
  "vcmlaq_rot180\0"
  "vcmlaq_rot180_m\0"
  "vcmlaq_rot270\0"
  "vcmlaq_rot270_m\0"
  "vcmlaq_rot90\0"
  "vcmlaq_rot90_m\0"
  "vcmpcsq_m\0"
  "vcmpcsq\0"
  "vcmpeqq\0"
  "vcmpeqq_m\0"
  "vcmpgeq\0"
  "vcmpgeq_m\0"
  "vcmpgtq\0"
  "vcmpgtq_m\0"
  "vcmphiq_m\0"
  "vcmphiq\0"
  "vcmpleq\0"
  "vcmpleq_m\0"
  "vcmpltq\0"
  "vcmpltq_m\0"
  "vcmpneq\0"
  "vcmpneq_m\0"
  "vcmulq\0"
  "vcmulq_m\0"
  "vcmulq_rot180\0"
  "vcmulq_rot180_m\0"
  "vcmulq_rot180_x\0"
  "vcmulq_rot270\0"
  "vcmulq_rot270_m\0"
  "vcmulq_rot270_x\0"
  "vcmulq_rot90\0"
  "vcmulq_rot90_m\0"
  "vcmulq_rot90_x\0"
  "vcmulq_x\0"
  "vcvtaq_m\0"
  "vcvtmq_m\0"
  "vcvtnq_m\0"
  "vcvtpq_m\0"
  "vcvtq\0"
  "vcvtq_m\0"
  "vcvtq_m_n\0"
  "vcvtq_n\0"
  "vcvtq_x\0"
  "vcvtq_x_n\0"
  "vddupq_m\0"
  "vddupq_u16\0"
  "vddupq_u32\0"
  "vddupq_u8\0"
  "vddupq_x_u16\0"
  "vddupq_x_u32\0"
  "vddupq_x_u8\0"
  "vdupq_m\0"
  "vdwdupq_m\0"
  "vdwdupq_u16\0"
  "vdwdupq_u32\0"
  "vdwdupq_u8\0"
  "vdwdupq_x_u16\0"
  "vdwdupq_x_u32\0"
  "vdwdupq_x_u8\0"
  "veorq\0"
  "veorq_m\0"
  "veorq_x\0"
  "vfmaq\0"
  "vfmaq_m\0"
  "vfmasq_m\0"
  "vfmasq\0"
  "vfmsq\0"
  "vfmsq_m\0"
  "vgetq_lane\0"
  "vhaddq_m\0"
  "vhaddq\0"
  "vhaddq_x\0"
  "vhcaddq_rot270_m\0"
  "vhcaddq_rot270\0"
  "vhcaddq_rot270_x\0"
  "vhcaddq_rot90_m\0"
  "vhcaddq_rot90\0"
  "vhcaddq_rot90_x\0"
  "vhsubq_m\0"
  "vhsubq\0"
  "vhsubq_x\0"
  "vidupq_m\0"
  "vidupq_u16\0"
  "vidupq_u32\0"
  "vidupq_u8\0"
  "vidupq_x_u16\0"
  "vidupq_x_u32\0"
  "vidupq_x_u8\0"
  "viwdupq_m\0"
  "viwdupq_u16\0"
  "viwdupq_u32\0"
  "viwdupq_u8\0"
  "viwdupq_x_u16\0"
  "viwdupq_x_u32\0"
  "viwdupq_x_u8\0"
  "vld1q\0"
  "vld1q_z\0"
  "vld2q\0"
  "vld4q\0"
  "vldrbq_gather_offset\0"
  "vldrbq_gather_offset_z\0"
  "vldrdq_gather_offset\0"
  "vldrdq_gather_offset_z\0"
  "vldrdq_gather_shifted_offset\0"
  "vldrdq_gather_shifted_offset_z\0"
  "vldrhq_gather_offset\0"
  "vldrhq_gather_offset_z\0"
  "vldrhq_gather_shifted_offset\0"
  "vldrhq_gather_shifted_offset_z\0"
  "vldrwq_gather_offset\0"
  "vldrwq_gather_offset_z\0"
  "vldrwq_gather_shifted_offset\0"
  "vldrwq_gather_shifted_offset_z\0"
  "vmaxaq_m\0"
  "vmaxaq\0"
  "vmaxavq_p\0"
  "vmaxavq\0"
  "vmaxnmaq\0"
  "vmaxnmaq_m\0"
  "vmaxnmavq\0"
  "vmaxnmavq_p\0"
  "vmaxnmq\0"
  "vmaxnmq_m\0"
  "vmaxnmq_x\0"
  "vmaxnmvq\0"
  "vmaxnmvq_p\0"
  "vmaxq_m\0"
  "vmaxq\0"
  "vmaxq_x\0"
  "vmaxvq_p\0"
  "vmaxvq\0"
  "vminaq_m\0"
  "vminaq\0"
  "vminavq_p\0"
  "vminavq\0"
  "vminnmaq\0"
  "vminnmaq_m\0"
  "vminnmavq\0"
  "vminnmavq_p\0"
  "vminnmq\0"
  "vminnmq_m\0"
  "vminnmq_x\0"
  "vminnmvq\0"
  "vminnmvq_p\0"
  "vminq_m\0"
  "vminq\0"
  "vminq_x\0"
  "vminvq_p\0"
  "vminvq\0"
  "vmladavaq_p\0"
  "vmladavaq\0"
  "vmladavaxq_p\0"
  "vmladavaxq\0"
  "vmladavq_p\0"
  "vmladavq\0"
  "vmladavxq_p\0"
  "vmladavxq\0"
  "vmlaldavaq_p\0"
  "vmlaldavaq\0"
  "vmlaldavaxq_p\0"
  "vmlaldavaxq\0"
  "vmlaldavq_p\0"
  "vmlaldavq\0"
  "vmlaldavxq_p\0"
  "vmlaldavxq\0"
  "vmlaq_m\0"
  "vmlaq\0"
  "vmlasq_m\0"
  "vmlasq\0"
  "vmlsdavaq_p\0"
  "vmlsdavaq\0"
  "vmlsdavaxq_p\0"
  "vmlsdavaxq\0"
  "vmlsdavq_p\0"
  "vmlsdavq\0"
  "vmlsdavxq_p\0"
  "vmlsdavxq\0"
  "vmlsldavaq_p\0"
  "vmlsldavaq\0"
  "vmlsldavaxq_p\0"
  "vmlsldavaxq\0"
  "vmlsldavq_p\0"
  "vmlsldavq\0"
  "vmlsldavxq_p\0"
  "vmlsldavxq\0"
  "vmovlbq_m\0"
  "vmovlbq\0"
  "vmovlbq_x\0"
  "vmovltq_m\0"
  "vmovltq\0"
  "vmovltq_x\0"
  "vmovnbq_m\0"
  "vmovnbq\0"
  "vmovntq_m\0"
  "vmovntq\0"
  "vmulhq_m\0"
  "vmulhq\0"
  "vmulhq_x\0"
  "vmullbq_int_m\0"
  "vmullbq_int\0"
  "vmullbq_int_x\0"
  "vmullbq_poly_m\0"
  "vmullbq_poly\0"
  "vmullbq_poly_x\0"
  "vmulltq_int_m\0"
  "vmulltq_int\0"
  "vmulltq_int_x\0"
  "vmulltq_poly_m\0"
  "vmulltq_poly\0"
  "vmulltq_poly_x\0"
  "vmulq\0"
  "vmulq_m\0"
  "vmulq_x\0"
  "vmvnq_m\0"
  "vmvnq\0"
  "vmvnq_x\0"
  "vnegq\0"
  "vnegq_m\0"
  "vnegq_x\0"
  "vornq\0"
  "vornq_m\0"
  "vornq_x\0"
  "vorrq\0"
  "vorrq_m\0"
  "vorrq_m_n\0"
  "vorrq_x\0"
  "vpselq\0"
  "vqabsq_m\0"
  "vqabsq\0"
  "vqaddq_m\0"
  "vqaddq\0"
  "vqdmladhq_m\0"
  "vqdmladhq\0"
  "vqdmladhxq_m\0"
  "vqdmladhxq\0"
  "vqdmlahq_m\0"
  "vqdmlahq\0"
  "vqdmlashq_m\0"
  "vqdmlashq\0"
  "vqdmlsdhq_m\0"
  "vqdmlsdhq\0"
  "vqdmlsdhxq_m\0"
  "vqdmlsdhxq\0"
  "vqdmulhq_m\0"
  "vqdmulhq\0"
  "vqdmullbq_m\0"
  "vqdmullbq\0"
  "vqdmulltq_m\0"
  "vqdmulltq\0"
  "vqmovnbq_m\0"
  "vqmovnbq\0"
  "vqmovntq_m\0"
  "vqmovntq\0"
  "vqmovunbq_m\0"
  "vqmovunbq\0"
  "vqmovuntq_m\0"
  "vqmovuntq\0"
  "vqnegq_m\0"
  "vqnegq\0"
  "vqrdmladhq_m\0"
  "vqrdmladhq\0"
  "vqrdmladhxq_m\0"
  "vqrdmladhxq\0"
  "vqrdmlahq_m\0"
  "vqrdmlahq\0"
  "vqrdmlashq_m\0"
  "vqrdmlashq\0"
  "vqrdmlsdhq_m\0"
  "vqrdmlsdhq\0"
  "vqrdmlsdhxq_m\0"
  "vqrdmlsdhxq\0"
  "vqrdmulhq_m\0"
  "vqrdmulhq\0"
  "vqrshlq_m_n\0"
  "vqrshlq_m\0"
  "vqrshlq\0"
  "vqrshrnbq_m\0"
  "vqrshrnbq\0"
  "vqrshrntq_m\0"
  "vqrshrntq\0"
  "vqrshrunbq_m\0"
  "vqrshrunbq\0"
  "vqrshruntq_m\0"
  "vqrshruntq\0"
  "vqshlq_m_n\0"
  "vqshlq_m_r\0"
  "vqshlq_m\0"
  "vqshlq_n\0"
  "vqshlq_r\0"
  "vqshlq\0"
  "vqshluq_m\0"
  "vqshluq\0"
  "vqshrnbq_m\0"
  "vqshrnbq\0"
  "vqshrntq_m\0"
  "vqshrntq\0"
  "vqshrunbq_m\0"
  "vqshrunbq\0"
  "vqshruntq_m\0"
  "vqshruntq\0"
  "vqsubq_m\0"
  "vqsubq\0"
  "vreinterpretq_f16\0"
  "vreinterpretq_f32\0"
  "vreinterpretq_s16\0"
  "vreinterpretq_s32\0"
  "vreinterpretq_s64\0"
  "vreinterpretq_s8\0"
  "vreinterpretq_u16\0"
  "vreinterpretq_u32\0"
  "vreinterpretq_u64\0"
  "vreinterpretq_u8\0"
  "vrev16q_m\0"
  "vrev16q\0"
  "vrev16q_x\0"
  "vrev32q\0"
  "vrev32q_m\0"
  "vrev32q_x\0"
  "vrev64q\0"
  "vrev64q_m\0"
  "vrev64q_x\0"
  "vrhaddq_m\0"
  "vrhaddq\0"
  "vrhaddq_x\0"
  "vrmlaldavhaq_p\0"
  "vrmlaldavhaq\0"
  "vrmlaldavhaxq_p\0"
  "vrmlaldavhaxq\0"
  "vrmlaldavhq_p\0"
  "vrmlaldavhq\0"
  "vrmlaldavhxq_p\0"
  "vrmlaldavhxq\0"
  "vrmlsldavhaq_p\0"
  "vrmlsldavhaq\0"
  "vrmlsldavhaxq_p\0"
  "vrmlsldavhaxq\0"
  "vrmlsldavhq_p\0"
  "vrmlsldavhq\0"
  "vrmlsldavhxq_p\0"
  "vrmlsldavhxq\0"
  "vrmulhq_m\0"
  "vrmulhq\0"
  "vrmulhq_x\0"
  "vrndaq\0"
  "vrndaq_m\0"
  "vrndaq_x\0"
  "vrndmq\0"
  "vrndmq_m\0"
  "vrndmq_x\0"
  "vrndnq\0"
  "vrndnq_m\0"
  "vrndnq_x\0"
  "vrndpq\0"
  "vrndpq_m\0"
  "vrndpq_x\0"
  "vrndq\0"
  "vrndq_m\0"
  "vrndq_x\0"
  "vrndxq\0"
  "vrndxq_m\0"
  "vrndxq_x\0"
  "vrshlq_m_n\0"
  "vrshlq_m\0"
  "vrshlq\0"
  "vrshlq_x\0"
  "vrshrnbq_m\0"
  "vrshrnbq\0"
  "vrshrntq_m\0"
  "vrshrntq\0"
  "vrshrq_m\0"
  "vrshrq\0"
  "vrshrq_x\0"
  "vsbciq_m\0"
  "vsbciq\0"
  "vsbcq_m\0"
  "vsbcq\0"
  "vsetq_lane\0"
  "vshlcq_m\0"
  "vshlcq\0"
  "vshllbq_m\0"
  "vshllbq\0"
  "vshllbq_x\0"
  "vshlltq_m\0"
  "vshlltq\0"
  "vshlltq_x\0"
  "vshlq_m_n\0"
  "vshlq_m_r\0"
  "vshlq_m\0"
  "vshlq_n\0"
  "vshlq_r\0"
  "vshlq\0"
  "vshlq_x_n\0"
  "vshlq_x\0"
  "vshrnbq_m\0"
  "vshrnbq\0"
  "vshrntq_m\0"
  "vshrntq\0"
  "vshrq_m\0"
  "vshrq\0"
  "vshrq_x\0"
  "vsliq_m\0"
  "vsliq\0"
  "vsriq_m\0"
  "vsriq\0"
  "vst1q\0"
  "vst1q_p\0"
  "vst2q\0"
  "vst4q\0"
  "vstrbq_p\0"
  "vstrbq\0"
  "vstrbq_scatter_offset_p\0"
  "vstrbq_scatter_offset\0"
  "vstrdq_scatter_base_p\0"
  "vstrdq_scatter_base\0"
  "vstrdq_scatter_base_wb_p\0"
  "vstrdq_scatter_base_wb\0"
  "vstrdq_scatter_offset_p\0"
  "vstrdq_scatter_offset\0"
  "vstrdq_scatter_shifted_offset_p\0"
  "vstrdq_scatter_shifted_offset\0"
  "vstrhq\0"
  "vstrhq_p\0"
  "vstrhq_scatter_offset\0"
  "vstrhq_scatter_offset_p\0"
  "vstrhq_scatter_shifted_offset\0"
  "vstrhq_scatter_shifted_offset_p\0"
  "vstrwq\0"
  "vstrwq_p\0"
  "vstrwq_scatter_base\0"
  "vstrwq_scatter_base_p\0"
  "vstrwq_scatter_base_wb\0"
  "vstrwq_scatter_base_wb_p\0"
  "vstrwq_scatter_offset\0"
  "vstrwq_scatter_offset_p\0"
  "vstrwq_scatter_shifted_offset\0"
  "vstrwq_scatter_shifted_offset_p\0"
  "vsubq\0"
  "vsubq_m\0"
  "vsubq_x\0"
  "vuninitializedq\0"
  ;
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif

static constexpr llvm::StringTable
BuiltinStrings = BuiltinStringsStorage;
#endif // GET_MVE_BUILTIN_STR_TABLE

#ifdef GET_MVE_BUILTIN_INFOS
    Builtin::Info{Builtin::Info::StrOffsets{14 /* asrl */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{19 /* lsll */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{24 /* sqrshr */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{31 /* sqrshrl */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{39 /* sqrshrl_sat48 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{53 /* sqshl */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{59 /* sqshll */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{66 /* srshr */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{72 /* srshrl */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{79 /* uqrshl */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{86 /* uqrshll */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{94 /* uqrshll_sat48 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{108 /* uqshl */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{114 /* uqshll */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{121 /* urshr */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{127 /* urshrl */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{134 /* vabavq_p_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{147 /* vabavq_p_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{160 /* vabavq_p_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{172 /* vabavq_p_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{185 /* vabavq_p_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{198 /* vabavq_p_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{210 /* vabavq_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{221 /* vabavq_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{232 /* vabavq_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{242 /* vabavq_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{253 /* vabavq_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{264 /* vabavq_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{274 /* vabdq_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{284 /* vabdq_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{294 /* vabdq_m_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{306 /* vabdq_m_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{318 /* vabdq_m_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{330 /* vabdq_m_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{342 /* vabdq_m_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{353 /* vabdq_m_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{365 /* vabdq_m_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{377 /* vabdq_m_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{388 /* vabdq_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{398 /* vabdq_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{408 /* vabdq_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{417 /* vabdq_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{427 /* vabdq_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{437 /* vabdq_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{446 /* vabdq_x_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{458 /* vabdq_x_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{470 /* vabdq_x_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{482 /* vabdq_x_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{494 /* vabdq_x_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{505 /* vabdq_x_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{517 /* vabdq_x_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{529 /* vabdq_x_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{540 /* vabsq_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{550 /* vabsq_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{560 /* vabsq_m_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{572 /* vabsq_m_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{584 /* vabsq_m_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{596 /* vabsq_m_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{608 /* vabsq_m_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{619 /* vabsq_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{629 /* vabsq_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{639 /* vabsq_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{648 /* vabsq_x_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{660 /* vabsq_x_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{672 /* vabsq_x_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{684 /* vabsq_x_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{696 /* vabsq_x_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{707 /* vadciq_m_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{720 /* vadciq_m_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{733 /* vadciq_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{744 /* vadciq_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{755 /* vadcq_m_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{767 /* vadcq_m_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{779 /* vadcq_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{789 /* vadcq_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{799 /* vaddlvaq_p_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{814 /* vaddlvaq_p_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{829 /* vaddlvaq_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{842 /* vaddlvaq_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{855 /* vaddlvq_p_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{869 /* vaddlvq_p_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{883 /* vaddlvq_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{895 /* vaddlvq_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{907 /* vaddq_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{917 /* vaddq_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{927 /* vaddq_m_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{939 /* vaddq_m_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{951 /* vaddq_m_n_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{965 /* vaddq_m_n_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{979 /* vaddq_m_n_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{993 /* vaddq_m_n_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1007 /* vaddq_m_n_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1020 /* vaddq_m_n_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1034 /* vaddq_m_n_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1048 /* vaddq_m_n_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1061 /* vaddq_m_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1073 /* vaddq_m_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1085 /* vaddq_m_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1096 /* vaddq_m_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1108 /* vaddq_m_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1120 /* vaddq_m_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1131 /* vaddq_n_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1143 /* vaddq_n_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1155 /* vaddq_n_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1167 /* vaddq_n_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1179 /* vaddq_n_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1190 /* vaddq_n_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1202 /* vaddq_n_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1214 /* vaddq_n_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1225 /* vaddq_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1235 /* vaddq_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1245 /* vaddq_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1254 /* vaddq_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1264 /* vaddq_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1274 /* vaddq_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1283 /* vaddq_x_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1295 /* vaddq_x_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1307 /* vaddq_x_n_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1321 /* vaddq_x_n_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1335 /* vaddq_x_n_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1349 /* vaddq_x_n_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1363 /* vaddq_x_n_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1376 /* vaddq_x_n_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1390 /* vaddq_x_n_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1404 /* vaddq_x_n_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1417 /* vaddq_x_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1429 /* vaddq_x_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1441 /* vaddq_x_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1452 /* vaddq_x_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1464 /* vaddq_x_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1476 /* vaddq_x_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1487 /* vaddvaq_p_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1501 /* vaddvaq_p_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1515 /* vaddvaq_p_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1528 /* vaddvaq_p_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1542 /* vaddvaq_p_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1556 /* vaddvaq_p_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1569 /* vaddvaq_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1581 /* vaddvaq_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1593 /* vaddvaq_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1604 /* vaddvaq_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1616 /* vaddvaq_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1628 /* vaddvaq_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1639 /* vaddvq_p_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1652 /* vaddvq_p_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1665 /* vaddvq_p_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1677 /* vaddvq_p_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1690 /* vaddvq_p_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1703 /* vaddvq_p_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1715 /* vaddvq_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1726 /* vaddvq_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1737 /* vaddvq_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1747 /* vaddvq_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1758 /* vaddvq_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1769 /* vaddvq_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1779 /* vandq_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1789 /* vandq_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1799 /* vandq_m_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1811 /* vandq_m_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1823 /* vandq_m_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1835 /* vandq_m_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1847 /* vandq_m_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1858 /* vandq_m_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1870 /* vandq_m_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1882 /* vandq_m_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1893 /* vandq_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1903 /* vandq_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1913 /* vandq_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1922 /* vandq_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1932 /* vandq_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1942 /* vandq_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1951 /* vandq_x_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1963 /* vandq_x_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1975 /* vandq_x_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1987 /* vandq_x_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{1999 /* vandq_x_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2010 /* vandq_x_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2022 /* vandq_x_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2034 /* vandq_x_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2045 /* vbicq_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2055 /* vbicq_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2065 /* vbicq_m_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2077 /* vbicq_m_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2089 /* vbicq_m_n_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2103 /* vbicq_m_n_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2117 /* vbicq_m_n_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2131 /* vbicq_m_n_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2145 /* vbicq_m_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2157 /* vbicq_m_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2169 /* vbicq_m_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2180 /* vbicq_m_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2192 /* vbicq_m_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2204 /* vbicq_m_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2215 /* vbicq_n_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2227 /* vbicq_n_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2239 /* vbicq_n_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2251 /* vbicq_n_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2263 /* vbicq_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2273 /* vbicq_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2283 /* vbicq_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2292 /* vbicq_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2302 /* vbicq_u32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2312 /* vbicq_u8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2321 /* vbicq_x_f16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2333 /* vbicq_x_f32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2345 /* vbicq_x_s16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2357 /* vbicq_x_s32 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2369 /* vbicq_x_s8 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2380 /* vbicq_x_u16 */, 0, 1 /* n */}},
    Builtin::Info{Builtin::Info::StrOffsets{2392 /* vbicq_x_u32 */, 0, 1 /* n */}},
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    Builtin::Info{Builtin::Info::StrOffsets{40107 /* vqrdmlashq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40094 /* vqrdmlashq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40131 /* vqrdmlsdhq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40118 /* vqrdmlsdhq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40156 /* vqrdmlsdhxq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40142 /* vqrdmlsdhxq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40180 /* vqrdmulhq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40168 /* vqrdmulhq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40212 /* vqrshlq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40202 /* vqrshlq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40190 /* vqrshlq_m_n */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40232 /* vqrshrnbq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40220 /* vqrshrnbq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40254 /* vqrshrntq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40242 /* vqrshrntq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40277 /* vqrshrunbq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40264 /* vqrshrunbq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40301 /* vqrshruntq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40288 /* vqrshruntq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40361 /* vqshlq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40334 /* vqshlq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40312 /* vqshlq_m_n */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40323 /* vqshlq_m_r */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40343 /* vqshlq_n */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40352 /* vqshlq_r */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40378 /* vqshluq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40368 /* vqshluq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40397 /* vqshrnbq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40386 /* vqshrnbq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40417 /* vqshrntq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40406 /* vqshrntq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40438 /* vqshrunbq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40426 /* vqshrunbq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40460 /* vqshruntq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40448 /* vqshruntq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40479 /* vqsubq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40470 /* vqsubq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40486 /* vreinterpretq_f16 */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40504 /* vreinterpretq_f32 */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40522 /* vreinterpretq_s16 */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40540 /* vreinterpretq_s32 */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40558 /* vreinterpretq_s64 */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40576 /* vreinterpretq_s8 */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40593 /* vreinterpretq_u16 */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40611 /* vreinterpretq_u32 */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40629 /* vreinterpretq_u64 */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40647 /* vreinterpretq_u8 */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40674 /* vrev16q */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40664 /* vrev16q_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40682 /* vrev16q_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40692 /* vrev32q */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40700 /* vrev32q_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40710 /* vrev32q_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40720 /* vrev64q */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40728 /* vrev64q_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40738 /* vrev64q_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40758 /* vrhaddq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40748 /* vrhaddq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40766 /* vrhaddq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40791 /* vrmlaldavhaq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40776 /* vrmlaldavhaq_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40820 /* vrmlaldavhaxq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40804 /* vrmlaldavhaxq_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40848 /* vrmlaldavhq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40834 /* vrmlaldavhq_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40875 /* vrmlaldavhxq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40860 /* vrmlaldavhxq_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40903 /* vrmlsldavhaq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40888 /* vrmlsldavhaq_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40932 /* vrmlsldavhaxq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40916 /* vrmlsldavhaxq_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40960 /* vrmlsldavhq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40946 /* vrmlsldavhq_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40987 /* vrmlsldavhxq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{40972 /* vrmlsldavhxq_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41010 /* vrmulhq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41000 /* vrmulhq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41018 /* vrmulhq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41028 /* vrndaq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41035 /* vrndaq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41044 /* vrndaq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41053 /* vrndmq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41060 /* vrndmq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41069 /* vrndmq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41078 /* vrndnq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41085 /* vrndnq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41094 /* vrndnq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41103 /* vrndpq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41110 /* vrndpq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41119 /* vrndpq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41128 /* vrndq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41134 /* vrndq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41142 /* vrndq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41150 /* vrndxq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41157 /* vrndxq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41166 /* vrndxq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41195 /* vrshlq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41186 /* vrshlq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41175 /* vrshlq_m_n */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41202 /* vrshlq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41222 /* vrshrnbq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41211 /* vrshrnbq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41242 /* vrshrntq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41231 /* vrshrntq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41260 /* vrshrq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41251 /* vrshrq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41267 /* vrshrq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41285 /* vsbciq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41276 /* vsbciq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41300 /* vsbcq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41292 /* vsbcq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41306 /* vsetq_lane */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41326 /* vshlcq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41317 /* vshlcq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41343 /* vshllbq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41333 /* vshllbq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41351 /* vshllbq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41371 /* vshlltq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41361 /* vshlltq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41379 /* vshlltq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41433 /* vshlq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41409 /* vshlq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41389 /* vshlq_m_n */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41399 /* vshlq_m_r */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41417 /* vshlq_n */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41425 /* vshlq_r */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41449 /* vshlq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41439 /* vshlq_x_n */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41467 /* vshrnbq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41457 /* vshrnbq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41485 /* vshrntq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41475 /* vshrntq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41501 /* vshrq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41493 /* vshrq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41507 /* vshrq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41523 /* vsliq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41515 /* vsliq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41537 /* vsriq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41529 /* vsriq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41543 /* vst1q */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41549 /* vst1q_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41557 /* vst2q */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41563 /* vst4q */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41578 /* vstrbq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41569 /* vstrbq_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41609 /* vstrbq_scatter_offset */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41585 /* vstrbq_scatter_offset_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41653 /* vstrdq_scatter_base */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41631 /* vstrdq_scatter_base_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41698 /* vstrdq_scatter_base_wb */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41673 /* vstrdq_scatter_base_wb_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41745 /* vstrdq_scatter_offset */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41721 /* vstrdq_scatter_offset_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41799 /* vstrdq_scatter_shifted_offset */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41767 /* vstrdq_scatter_shifted_offset_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41829 /* vstrhq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41836 /* vstrhq_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41845 /* vstrhq_scatter_offset */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41867 /* vstrhq_scatter_offset_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41891 /* vstrhq_scatter_shifted_offset */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41921 /* vstrhq_scatter_shifted_offset_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41953 /* vstrwq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41960 /* vstrwq_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41969 /* vstrwq_scatter_base */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{41989 /* vstrwq_scatter_base_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{42011 /* vstrwq_scatter_base_wb */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{42034 /* vstrwq_scatter_base_wb_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{42059 /* vstrwq_scatter_offset */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{42081 /* vstrwq_scatter_offset_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{42105 /* vstrwq_scatter_shifted_offset */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{42135 /* vstrwq_scatter_shifted_offset_p */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{42167 /* vsubq */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{42173 /* vsubq_m */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{42181 /* vsubq_x */, 10 /* vi. */, 3 /* nt */}},
    Builtin::Info{Builtin::Info::StrOffsets{42189 /* vuninitializedq */, 10 /* vi. */, 6 /* ntu */}},
#endif // GET_MVE_BUILTIN_INFOS

